Methods for sequencing memory access requests
Memory access requests are successively received in a memory request queue of a memory controller. Any conflicts or potential delays between temporally proximate requests that would occur if the memory access requests were to be executed in the received order are detected, and the received order of the memory access requests is rearranged to avoid or minimize the conflicts or delays and to optimize the flow of data to and from the memory data bus. The memory access requests are executed in the reordered sequence, while the originally received order of the requests is tracked. After execution, data read from the memory device by the execution of the read-type memory access requests are transferred to the respective requestors in the order in which the read requests were originally received.
1. A method for controlling memory access operations, comprising:
receiving a plurality of memory access requests in a received sequence, each one of the plurality of memory access requests comprising a data control command and a read or write command;
detecting memory access conflicts or delays among temporally proximate requests in the sequence by comparing one of a plurality of non-executed memory access requests with a different one of the plurality of non-executed memory access requests, said plurality of non-executed memory access requests comprising at least a subset of said plurality of memory access requests; and
separating the data control command and the read or write command of the plurality of non-executed memory access requests; and
rearranging the received sequence into a rearranged sequence of requests based on the step of detecting such that a first data control command for a first request of said plurality of non-executed memory requests is executed while or before a second read or write command from a second request of said plurality of non-executed memory requests is executed, said second request being different from said first request and such that the first read or write command is executed after the second read or write command.
2. The method according to claim 1 , further comprising executing the rearranged sequence of requests.
3. The method according to claim 2 , further comprising:
keeping track of the received sequence of memory access requests after execution; and
transferring to respective requestors, requested data obtained by execution of read requests in the rearranged sequence of requests, wherein the requested data is transferred to the respective requestors in an order corresponding to the received sequence of the respective read requests.
4. The method according to claim 3 , wherein keeping track of the received sequence includes, after rearranging the sequence of requests, associating a tag with each read request to indicate the sequence in which the read requests were originally received.
5. The method according to claim 1 , wherein the step of detecting is performed to detect whether a conflict would be created upon executing a most recently received memory access request in its current position in the received sequence.
6. The method according to claim 1 , wherein the step of rearranging is performed to minimize a delay which would be caused by waiting for a memory bank to become available for access during a detected bank busy conflict.
7. The method according to claim 1 , wherein the step of detecting is performed to detect whether a page conflict would be created upon executing a most recently received memory access request in its current position in the received sequence.
8. The method according to claim 1 , wherein the second request is received prior to the first request.
9. The method according to claim 1 , wherein said rearranging places the first data control command ahead in execution order relative to the second read or write command.
10. A method for sequencing memory access request, comprising:
receiving a plurality of memory access requests in a sequenced order in a sequence matrix;
detecting whether a first conflict or delay would occur among the plurality of memory access requests, the first conflict or delay arising from a comparison of a first non-executed memory access request of the plurality of requests with a second non-executed memory access request of the plurality of requests; and
arranging an execution order in the sequence matrix based on detected memory access conflicts or delays, wherein at least one of said plurality of memory access requests in the sequence matrix is arranged by being moved back or ahead in the sequence matrix;
wherein:
each one of the plurality of memory access requests comprises a data control command and a read or write command;
said arranging the execution order produces a rearranged sequence by causing rearranging of a first read or write command and a first data control command for said first non-executed memory request such that said first data control command is executed before a second read or write command from the second non-executed memory access request is executed and such that the first read or write command is executed after the second read or write command; and
the first non-executed memory access request is different from the second non-executed memory access request.
11. The method according to claim 10 , wherein if the first conflict or delay is detected with respect to the first memory access request in the sequenced order and the first memory access request is last in the sequence matrix, the step of rearranging includes moving a latest received memory access request to a first position to resolve a unresolved conflict or delay in the sequence.
12. The method according to claim 11 , wherein if there is no unresolved conflict or delay in the sequence, the step of rearranging includes moving the latest memory access request to a second position so as to not create a second conflict or delay in the sequence.
13. The method according to claim 12 , wherein if the first conflict or delay is detected with respect to a first non-executed memory access request in the sequenced order and the first memory access request is an earliest received request in the sequence matrix, the step of rearranging includes selecting a third received memory access request to move to a beginning of the sequence.
14. The method according to claim 13 , wherein the third received memory request is selected by determining an earliest received request of said plurality of requests that resolves the first conflict.
15. The method according to claim 10 , wherein if the first conflict or delay is detected with respect to a first non-executed memory access request in the sequenced order and the first memory access request is an earliest received request in the sequence matrix, the step of rearranging includes moving the first memory access request to a last position of the sequence.
16. The method according to claim 10 , wherein the step of rearranging is performed to minimize a delay which would be caused by waiting for a memory bank to become available for access during a detected bank busy conflict or to detect whether a page conflict would be created upon executing the most recently received memory access request in its current position in the sequenced order in the sequence matrix.
17. The method according to claim 10 , further comprising executing the rearranged sequence.
18. The method according to claim 10 , further comprising:
keeping track of the sequenced order in the sequence matrix after execution;
and transferring to respective requestors, requested data obtained by execution of read requests in the rearranged sequence, wherein the requested data is transferred to the respective requestors in an order corresponding to the sequenced order in the sequence matrix of the respective read requests were originally received, whereby the data obtained by the executed read requests are to be returned to the requestors in the rearranged sequence, wherein the controller is configured to interface with memory having one of multiple memory clock speeds.
19. The method according to claim 10 , wherein the second non-executed memory access request is received prior to the first non-executed executed memory access request.
20. A method for controlling memory access, comprising:
receiving a plurality of memory access requests in a received sequence, each one of the plurality of memory access requests comprising a data control command and a read or write command;
separating a first data control command from a first read or write command of a first memory access request, the first memory access request being one of a plurality of non-executed memory access requests in the sequence; and
rearranging said first read or write command and said first data control command such that one or more read or write commands of the plurality of non-executed memory access requests are scheduled to be performed between the execution of the first data control command and the execution of the first read or write command.
21. The method according to claim 20 , wherein the rearranging (i) minimizes a delay which would be caused by waiting for a memory bank to become available for access during a detected bank busy conflict, and/or (i) enables detection of whether a page conflict would be created upon executing a most recently received memory access request in its current position in the received sequence.
22. The method according to claim 20 , further comprising:
detecting memory access conflicts or delays among temporally proximate requests in the sequence by comparing one of the plurality of non-executed memory access requests with a different one of the plurality of non-executed memory access requests.
23. The method according to claim 22 , wherein the detecting is performed to detect whether a conflict would be created upon executing a most recently received memory access request in its current position in the received sequence.