IP Library › Granted Patent US 8,643,114
Granted Patent B2
US 8,643,114 · App. 12/820,252 · Granted Feb 4, 2014

Semiconductor device and electronic apparatus

Inventors: Takashi Aoki (Suwa, JP); Mutsumi Kimura (Otsu, JP); Takashi Nakanishi (Otsu, JP); Mariko Sakemi (Otsu, JP)
Assignees: Seiko Epson Corporation; Ryukoku University
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Quick Facts
Patent No.
US 8,643,114
App. No.
12/820,252
Granted
Feb 4, 2014
Kind
B2
Abstract

A semiconductor device includes: a substrate; a p-type organic transistor including an organic semiconductor layer arranged on or above the substrate; and an n-type inorganic transistor including an inorganic semiconductor layer arranged on or above the organic transistor, wherein a channel region of the inorganic transistor overlaps a channel region of the organic transistor at least partially in a plan view.

Claims (27)

1. A semiconductor device comprising:

a substrate;

a p-type organic transistor including an organic semiconductor layer arranged on or above the substrate; and

an n-type inorganic transistor including an inorganic semiconductor layer arranged on or above the organic transistor, wherein a channel region of the inorganic transistor overlaps a channel region of the organic transistor at least partially in a plan view and a gate insulating layer of the inorganic transistor is arranged in a manner covering the organic semiconductor layer,

wherein a whole of the organic semiconductor layer overlaps the gate insulating layer of the inorganic transistor in a plan view and an area of the organic semiconductor layer is larger than an area of the inorganic semiconductor layer.

2. The semiconductor device according to claim 1 ,

wherein an electrode functioning as a gate electrode of the organic transistor and also functioning as a gate electrode of the inorganic transistor is arranged above a gate insulating layer of the organic transistor and below the gate insulating layer of the inorganic transistor.

3. The semiconductor device according to claim 1 ,

wherein the organic transistor has a top gate structure and the inorganic transistor has a bottom gate structure; and

a CMOS circuit is formed by the organic transistor and the inorganic transistor.

4. The semiconductor device according to claim 2 ,

wherein any one of a source electrode and a drain electrode of the organic transistor is electrically connected, via a first electrical conductor arranged to extend from the gate insulating layer of the organic transistor to the gate insulating layer of the inorganic transistor, to any one of a source electrode and a drain electrode of the inorganic transistor; and

a second electrical conductor electrically connected to the first electrical conductor is arranged between the gate insulating layer of the organic transistor and the gate insulating layer of the inorganic transistor.

5. The semiconductor device according to claim 2 ,

wherein the gate electrode and any one of a source electrode and a drain electrode of the inorganic transistor are connected via a first electrical conductor arranged to extend from the gate insulating layer of the organic transistor to the gate insulating layer of the inorganic transistor; and

a second electrical conductor electrically connected to the first electrical conductor is formed below the gate insulating layer of the organic transistor.

6. The semiconductor device according to claim 1 ,

wherein both the source electrode and the drain electrode of the organic transistor have a comb-tooth shape, and some of the comb teeth of one electrode are arranged so as to be disposed between the comb teeth of the other electrode.

7. The semiconductor device according to claim 6 ,

wherein at least one of the source electrode and the drain electrode of the organic transistor is arranged in a region overlapping the channel region of the inorganic transistor in a plan view; and

a region is arranged in which neither of the source electrode and the drain electrode of the organic transistor is arranged along a longitudinal direction of the channel of the inorganic transistor in an area extending from the end of the source electrode side of the inorganic transistor to the end of the drain electrode side of the inorganic transistor of the channel region of the inorganic transistor.

8. The semiconductor device according to claim 1 ,

wherein at least one of a source electrode and a drain electrode of the organic transistor is formed in the outside of the channel region of the inorganic transistor in a plan view.

9. The semiconductor device according to claim 1 ,

wherein the gate insulating layer of the inorganic transistor is formed of a polymer.

10. An electronic apparatus comprising a semiconductor device according to claim 1 .

11. The semiconductor device according to claim 1 , wherein between the gate insulating layer of the inorganic transistor and the organic semiconductor layer, a gate insulating layer of the organic transistor is arranged in a manner covering the organic semiconductor layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 22, 2010
From: AOKI, TAKASHI; KIMURA, MUTSUMI; NAKANISHI, TAKASHI; SAKEMI, MARIKO
To: SEIKO EPSON CORPORATION; RYUKOKU UNIVERSITY
Reel/Frame 024571/0987 →
Priority Claims (1)
JP 2009-150769 · Jun 25, 2009 · national
Continuity (1)
Related Publication 20100327282A1 · Dec 30, 2010