Semiconductor packages and electronic systems including the same

1. A semiconductor package comprising:

a substrate; and

a plurality of semiconductor chips stacked on the substrate, each of the plurality of semiconductor chips including at least one electrode pad,

wherein an uppermost chip of the plurality of semiconductor chips includes at least one redistribution pad configured to electrically connect with the at least one electrode pad via at least one redistribution line,

wherein the at least one redistribution pad and the at least one electrode pad are disposed along different edges on the same surface of the uppermost chip, and

wherein the plurality of semiconductor chips are stacked in offset directions from one another.

2. The semiconductor package of claim 1 , wherein the uppermost semiconductor chip is stacked directly on one of the plurality of semiconductor chips.

3. The semiconductor package of claim 2 , wherein the at least one redistribution pad of the uppermost chip is adjacent to one of the at least one electrode pad and at least one redistribution pad on the one of the plurality of semiconductor chips.

4. The semiconductor package of claim 1 , further comprising:

a plurality of bonding wires configured to connect the plurality of semiconductor chips,

wherein at least one of the plurality of bonding wires is connected with the uppermost chip through the at least one redistribution pad.

5. The semiconductor package of claim 1 , wherein the at least one redistribution pad and the at least one electrode pad are exposed.

6. An electronic system comprising:

an input/output unit communicating data with an external device;

a memory unit storing the data; and

a processor unit executing the data,

wherein the memory unit includes the semiconductor package of claim 1 .

7. The electronic system of claim 6 , wherein the processor unit, the input/output unit, and the memory unit communicate data therebetween via a bus.