IP Library Granted Patent US 8,647,919
Granted Patent B2
US 8,647,919 · App. 13/227,074 · Granted Feb 11, 2014

Light-emitting display device and method for manufacturing the same

Inventors: Shunpei Yamazaki (Tokyo, JP); Kaoru Hatano (Kanagawa, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
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Quick Facts
Patent No.
US 8,647,919
App. No.
13/227,074
Granted
Feb 11, 2014
Kind
B2
Abstract

Provided is a method to manufacture a light-emitting display device in which a contact hole for the electrical connection of the pixel electrode and one of the source and drain electrode of a transistor and a contact hole for the processing of a semiconductor layer are formed simultaneously. The method contributes to the reduction of a photography step. The transistor includes an oxide semiconductor layer where a channel formation region is formed.

Claims (43)

1. A method for manufacturing a light-emitting display device, the method comprising:

forming a separation layer over a substrate;

forming a first gate electrode and a second gate electrode over the separation layer;

forming a gate insulating layer over the first gate electrode and the second gate electrode;

forming an oxide semiconductor layer over the gate insulating layer;

forming a first contact hole over the second gate electrode;

forming a first source electrode, a first drain electrode, a second source electrode, and a second drain electrode over the oxide semiconductor layer so that one of the first source electrode and the first drain electrode is electrically connected to the second gate electrode;

forming an insulating layer over the first source electrode, the first drain electrode, the second source electrode, and the second drain electrode;

forming a second contact hole and a third contact hole simultaneously;

forming a first pixel electrode over the second contact hole and the third contact hole; and

separating the first gate electrode, the second gate electrode, the gate insulating layer, the oxide semiconductor layer, the first source electrode, the first drain electrode, the second source electrode, the second drain electrode, the insulating layer, and the first pixel electrode from the substrate,

wherein the first contact hole is formed in the oxide semiconductor layer and the gate insulating layer to expose the second gate electrode,

wherein the second contact hole is formed in the insulating layer to expose part of one of the second source electrode and the second drain electrode, and

wherein the third contact hole is formed in the insulating layer and the oxide semiconductor layer to expose the gate insulating layer.

2. The method according to claim 1 , wherein the first pixel electrode is in contact with the one of the second source electrode and the second drain electrode in the second contact hole.

3. The method according to claim 1 , wherein the first pixel electrode is formed so as to be in contact with a side surface of the oxide semiconductor layer in the third contact hole.

4. The method according to claim 1 , wherein the first pixel electrode is formed so as to be in contact with a top surface of the gate insulating layer in the third contact hole.

5. The method according to claim 1 , further comprising a step of forming a base layer before the formation of the first gate electrode and the second gate electrode.

6. The method according to claim 1 , wherein the oxide semiconductor layer comprises an element selected from gallium and indium.

7. A method for manufacturing a light-emitting display device, the method comprising:

forming a separation layer over a substrate;

forming a first gate electrode and a second gate electrode over the separation layer;

forming a gate insulating layer over the first gate electrode and the second gate electrode;

forming an oxide semiconductor layer over the gate insulating layer;

forming a first contact hole over the second gate electrode;

forming a first source electrode, a first drain electrode, a second source electrode, and a second drain electrode over the oxide semiconductor layer so that one of the first source electrode and the first drain electrode is electrically connected to the second gate electrode;

forming an insulating layer over the first source electrode, the first drain electrode, the second source electrode, and the second drain electrode;

forming a second contact hole, a third contact hole, and a fourth contact hole simultaneously;

forming a first pixel electrode over the second contact hole and the third contact hole; and

separating the first gate electrode, the second gate electrode, the gate insulating layer, the oxide semiconductor layer, the first source electrode, the first drain electrode, the second source electrode, the second drain electrode, the insulating layer, and the first pixel electrode from the substrate,

wherein the first contact hole is formed in the oxide semiconductor layer and the gate insulating layer to expose the second gate electrode,

wherein the second contact hole is formed in the insulating layer to expose part of one of the second source electrode and the second drain electrode,

wherein the third contact hole is formed in the insulating layer and the oxide semiconductor layer to expose the gate insulating layer, and

wherein the fourth contact hole is formed in the insulating layer and the oxide semiconductor layer to divide the oxide semiconductor layer into a first oxide semiconductor layer and a second oxide semiconductor layer.

8. The method according to claim 7 ,

wherein the first gate electrode, the gate insulating layer, the first oxide semiconductor layer, the first source electrode, and the first drain electrode form a first transistor, and

wherein the second gate electrode, the gate insulating layer, the second oxide semiconductor layer, the second source electrode, and the second drain electrode form a second transistor.

9. The method according to claim 7 , wherein the first pixel electrode is in contact with the one of the second source electrode and the second drain electrode in the second contact hole.

10. The method according to claim 7 , wherein the first pixel electrode is formed so as to be in contact with a side surface of the second oxide semiconductor layer in the third contact hole.

11. The method according to claim 7 , wherein the first pixel electrode is formed so as to be in contact with a top surface of the gate insulating layer in the third contact hole.

12. The method according to claim 7 , further comprising a step of forming a base layer before the formation of the first gate electrode and the second gate electrode.

13. The method according to claim 7 , wherein the oxide semiconductor layer comprises an element selected from gallium and indium.

14. The method according to claim 7 , further comprising forming a second insulating layer over the first pixel electrode, wherein the fourth contact hole is filled with the second insulating layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 14, 2011
From: YAMAZAKI, SHUNPEI; HATANO, KAORU
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 026900/0993 →
Priority Claims (1)
JP 2010-204935 · Sep 13, 2010 · national
Continuity (1)
Related Publication 20120061664A1 · Mar 15, 2012