IP Library › Granted Patent US 8,653,562
Granted Patent B2
US 8,653,562 · App. 13/339,055 · Granted Feb 18, 2014

Structure of a high electron mobility transistor

Inventors: Cheng-Guan Yuan (Tao Yuan Shien, TW); Shih-Ming Joseph Liu (Tao Yuan Shien, TW)
Assignee: WIN Semiconductor Corp.
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Quick Facts
Patent No.
US 8,653,562
App. No.
13/339,055
Granted
Feb 18, 2014
Kind
B2
Abstract

An improved structure of the high electron mobility transistor (HEMT) and a fabrication method thereof are disclosed. The improved HEMT structure comprises a substrate, a channel layer, a spacing layer, a carrier supply layer, a Schottky layer, a first etch stop layer, a first n type doped layer formed by Al x Ga 1-x As, and a second n type doped layer. The fabrication method comprises steps of: etching a gate, a drain, and a source recess by using a multiple selective etching process. Below the gate, the drain, and the source recess is the Schottky layer. A gate electrode is deposited in the gate recess to form Schottky contact. A drain electrode and a source electrode are deposited to form ohmic contacts in the drain recess and the source recess respectively, and on the second n type doped layer surrounding the drain recess and the source recess respectively.

Claims (58)

1. A high electron mobility transistor (HEMT) comprising sequentially:

a substrate;

a channel layer positioned above said substrate;

a spacing layer positioned above said channel layer;

a carrier supply layer positioned above said spacing layer;

a Schottky layer positioned above said carrier supply;

a first etch stop layer positioned above said Schottky layer;

a first n type doped layer positioned above said first etch stop layer, which is formed of Al x Ga 1-x As;

a second n type doped layer positioned above said first n type doped layer;

a gate recess formed by using a multiple selective etching process which is terminated at said Schottky layer;

a drain recess positioned at one end of said gate recess, which is formed by using a multiple selective etching process which is terminated at said Schottky layer;

a source recess positioned at the other end of said gate recess, which is formed by using a multiple selective etching process which is terminated at said Schottky layer;

a gate electrode positioned in said gate recess and formed Schottky contact to said Schottky layer;

a drain electrode positioned in said drain recess and said second n type doped layer surrounding said drain recess, which forms ohmic contact to said second n type doped layer and said Schottky layer; and

a source electrode positioned in said source recess and said second n type doped layer surrounding said source recess, which forms ohmic contact to said second n type doped layer and said Schottky layer.

2. The structure of HEMT according to claim 1 , wherein the material used for said first n type doped layer is Al x Ga 1-x As with an Al content, x, larger than 0.0 and smaller than 0.5, and the thickness of said first n type doped layer is larger than 0 and smaller than 100 nm.

3. The structure of HEMT according to claim 1 , wherein said drain recess is formed by three recesses, including sequentially:

a first drain recess, forming in said second n type doped layer;

a second drain recess, forming in said first etch stop layer;

a third drain recess, forming in said first n type doped layer,

wherein said first drain recess is larger than, equal to, or smaller than said third drain recess.

4. The structure of HEMT according to claim 1 , wherein said source recess is formed by three recesses, including sequentially:

a first source recess, forming in said second n type doped layer;

a second source recess, forming in said first etch stop layer;

a third source recess, forming in said first n type doped layer,

wherein said first drain recess is larger than, equal to, or smaller than said third drain recess.

5. The structure of HEMT according to claim 1 , wherein said drain electrode forms ohmic contact to said first n type doped layer and forms ohmic contact to said second n type doped layer in the meantime.

6. The structure of HEMT according to claim 1 , wherein said source electrode forms ohmic contact to said first n type doped layer and forms ohmic contact to said second n type doped layer in the meantime.

7. The structure of HEMT according to claim 1 , wherein a second etch stop layer is inserted between said first n type doped layer and said second n type doped layer.

8. The structure of HEMT according to claim 7 , wherein said second etch stop layer is formed of AlAs or InGaP.

9. The structure of HEMT according to claim 1 , wherein said second n type doped layer is formed of GaAs, and the thickness of said second n type doped layer is larger than 0 and smaller than 100 nm.

10. The structure of HEMT according to claim 1 , wherein said etching process is dry etching or wet etching.

11. The structure of HEMT according to claim 1 , wherein said first etch stop layer is formed of AlAs or InGaP.

12. The structure of HEMT according to claim 1 , wherein said Schottky layer is formed of Al x Ga 1-x As with an Al content, x, larger than 0.0 and smaller than 0.6, and the thickness of said Schottky layer is larger than 0 and smaller than 100 nm.

13. A high electron mobility transistor (HEMT) comprises sequentially:

a substrate;

a channel layer positioned above said substrate;

a spacing layer positioned above said channel layer;

a carrier supply layer positioned above said spacing layer;

a Schottky layer positioned above said carrier supply;

a first etch stop layer positioned above said Schottky layer;

a first n type doped layer positioned above said first etch stop layer;

a second n type doped layer positioned above said first n type doped layer;

a gate recess formed by using a multiple selective etching process and terminated the etching process at said Schottky layer;

a drain recess positioned at one end of said gate recess, which is formed by using a multiple selective etching process which is terminated at said Schottky layer, wherein the drain recess formed in the second n type doped layer is larger than the drain recess formed in the first n type doped layer;

a source recess positioned at the other end of said gate recess, which is formed by using a multiple selective etching process which is terminated at said Schottky layer, wherein the source recess formed in the second n type doped layer is larger than the source recess formed in the first n type doped layer;

a gate electrode positioned in said gate recess and formed Schottky contact to said Schottky layer;

a drain electrode positioned in said drain recess and said second n type doped layer surrounding said drain recess, which forms ohmic contact to said second n type doped layer and said Schottky layer; and

a source electrode positioned in said source recess and said second n type doped layer surrounding said source recess, which forms ohmic contact to said second n type doped layer and said Schottky layer.

14. The structure of HEMT according to claim 13 , wherein the material used for said first n type doped layer is GaAs, Al x Ga 1-x As, In x Al 1-x As, In x Ga 1-x As, or InAlGaAs, with an Al content x in Al x Ga 1-x As larger than 0.0 and smaller than 0.5, with an In content x in In x Al 1-x As larger than 0.0 and smaller than 0.5, with an In content x in In x Ga 1-x As larger than 0.0 and smaller than 0.5, and the thickness of said first n type doped layer is larger than 0 and smaller than 100 nm.

15. The structure of HEMT according to claim 13 , wherein the material used for said second n type doped layer is GaAs, Al x Ga 1-x As, In x Ga 1-x As, or InAlGaAs, with an Al content x in Al x Ga 1-x As larger than 0.0 and smaller than 0.5, with an In content x in In x Al 1-x As larger than 0.0 and smaller than 0.5, with an In content x in In x Ga 1-x As larger than 0.0 and smaller than 0.5, and the thickness of said second n type doped layer is larger than 0 and smaller than 100 nm.

16. The structure of HEMT according to claim 13 , wherein said drain electrode forms ohmic contact to said first n type doped layer and forms ohmic contact to said second n type doped layer in the meantime.

17. The structure of HEMT according to claim 13 , wherein said source electrode forms ohmic contact to said first n type doped layer and forms ohmic contact to said second n type doped layer in the meantime.

18. The structure of HEMT according to claim 13 , wherein a second etch stop layer is inserted between said first n type doped layer and said second n type doped layer.

19. The structure of HEMT according to claim 18 , wherein said second etch stop layer is formed of AlAs or InGaP.

20. The structure of HEMT according to claim 13 , wherein said etching process is dry etching or wet etching.

21. The structure of HEMT according to claim 13 , wherein said first etch stop layer is formed of AlAs or InGaP.

22. The structure of HEMT according to claim 13 , wherein said Schottky layer is formed of Al x Ga 1-x As with an Al content, x, larger than 0.0 and smaller than 0.6, and the thickness of said Schottky layer is larger than 0 and smaller than 100 nm.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 28, 2011
From: YUAN, CHENG-GUAN; LIU, SHIH-MING JOSEPH
To: WIN SEMICONDUCTORS CORP.
Reel/Frame 027454/0635 →
Priority Claims (1)
TW 100135477 A · Sep 30, 2011 · national
Continuity (1)
Related Publication 20130082305A1 · Apr 4, 2013