Barrier layer for copper interconnect
A copper interconnect includes a copper layer formed in a dielectric layer. A glue layer is formed between the copper layer and the dielectric layer. A barrier layer is formed at the boundary between the glue layer and the dielectric layer. The barrier layer is a metal oxide.
1. A semiconductor device, comprising:
a semiconductor substrate;
a dielectric layer overlying the semiconductor substrate;
a conductive layer in the dielectric layer;
a glue layer formed between the conductive layer and the dielectric layer; and
a conductive seed layer formed between the conductive layer and the glue layer; and
a continuous metal oxide barrier layer comprising two sidewall portions on opposite sides of the conductive layer, wherein the glue layer comprises sidewall portions between the conductive layer and the two sidewall portions of the metal oxide barrier layer.
2. The semiconductor device of claim 1 , wherein the glue layer has a melting point higher than 300° C.
3. The semiconductor device of claim 1 , wherein the continuous metal oxide barrier layer is a manganese-containing dielectric layer.
4. The semiconductor device of claim 1 , wherein the glue layer comprises a metal different from metals in the metal oxide layer.
5. The semiconductor device of claim 1 , wherein the conductive seed layer comprises a metal different from metals in the conductive layer.
6. The semiconductor device of claim 1 , wherein the glue layer comprises cobalt (Co), silver (Ag), zinc (Zn), calcium (Ca), gold (Au), tungsten (W), molybdenum (Mo), nickel (Ni), chromium (Cr), or combinations thereof.
7. The semiconductor device of claim 1 , wherein each of the two sidewall portions of the metal oxide barrier layer comprises a substantially vertical surface contacting the dielectric layer.
8. The semiconductor device of claim 1 , wherein the conductive layer is formed in a dual damascene opening formed in the dielectric layer, and the dual damascene opening comprises an upper trench section and a lower via-hole section, wherein the metal oxide barrier layer further comprises a horizontal portion overlapped by the upper trench section, and wherein the horizontal portion has a bottom surface contacting the dielectric layer.
9. The semiconductor device of claim 1 , wherein the conductive seed layer is a copper-containing layer.
10. The semiconductor device of claim 1 , wherein the conductive seed layer is a manganese-containing layer.
11. The semiconductor device of claim 1 , wherein the dielectric layer comprises a dielectric material layer with a dielectric constant less than 2.5.
12. The semiconductor device of claim 1 , further comprising an etch stop layer formed between the semiconductor substrate and the dielectric layer.
13. A semiconductor device, comprising:
a semiconductor substrate;
a dielectric layer overlying the semiconductor substrate, wherein an opening comprises an upper trench section and a lower via-hole section is formed in the dielectric layer;
a copper-containing layer filling the opening formed in the dielectric layer;
a conductive glue layer formed between the copper-containing layer and the dielectric layer;
a conductive seed layer between the copper-containing layer and the conductive glue layer; and
an oxygen-containing barrier layer comprising a substantially vertical sidewall portion formed at a boundary between a substantially vertical sidewall portion of the conductive glue layer and the dielectric layer.
14. The semiconductor device of claim 13 , wherein the oxygen-containing barrier layer comprises manganese (Mn).
15. The semiconductor device of claim 13 , wherein the conductive glue layer comprises cobalt (Co), silver (Ag), zinc (Zn), calcium (Ca), gold (Au), tungsten (W), molybdenum (Mo), nickel (Ni), chromium (Cr), or combinations thereof.
16. The semiconductor device of claim 13 , further comprising a first etch stop layer formed between the semiconductor substrate an the dielectric layer.
17. The semiconductor device of claim 13 , wherein the substantially vertical sidewall portion of the oxygen-containing barrier layer comprises:
a first substantially vertical sidewall contacting the dielectric layer; and
a second substantially vertical sidewall contacting the conductive glue layer, wherein the first and the second substantially vertical sidewalls are opposite sidewalls of the oxygen-containing barrier layer.
18. A semiconductor device, comprising:
a semiconductor substrate;
an oxygen-containing dielectric layer overlying the semiconductor substrate, wherein an opening comprises an upper trench section and a lower via-hole section is formed in the oxygen-containing dielectric layer;
a copper-containing layer filling the opening formed in the oxygen-containing dielectric layer;
a conductive glue layer formed between the copper-containing layer and the oxygen-containing dielectric layer;
a conductive seed layer between the copper-containing layer and the conductive glue layer;
a metal oxide barrier layer formed at a boundary between the conductive glue layer and the oxygen-containing dielectric layer, wherein a horizontal portion of the metal oxide barrier layer overlapped by the upper trench section comprises a top surface contacting a horizontal portion of the conductive glue layer, and a bottom surface contacting the oxygen-containing dielectric layer; and
an etch stop layer formed overlying the copper-containing layer.
19. The semiconductor device of claim 13 , wherein the conductive glue layer comprises a metal different from metals in the oxygen-containing barrier layer.