IP Library › Granted Patent US 8,664,540
Granted Patent B2
US 8,664,540 · App. 13/118,129 · Granted Mar 4, 2014

Interposer testing using dummy connections

Inventors: Hsiang-Tai Lu (Zhubei, TW); Chih-Hsien Lin (Tai-Chung, TW); Wei-Sho Hung (Beigang Township, TW)
Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
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Quick Facts
Patent No.
US 8,664,540
App. No.
13/118,129
Granted
Mar 4, 2014
Kind
B2
Abstract

An interconnection component includes a substrate, and an active through-substrate via (TSV) penetrating through the substrate. Active metal connections are formed over the substrate and electrically connected to the active TSV. At least one of a dummy pad and a dummy solder bump are formed at surfaces of the interconnection component. The dummy pad is over the substrate and electrically connected to the active TSV and the active metal connections. The dummy solder bump is under the substrate and electrically connected to the active metal connections. The dummy pad and the dummy solder bump are open ended.

Claims (15)

1. A circuit structure comprising:

an interposer free from active devices formed therein, wherein the interposer comprises:

a substrate;

an active through-substrate via (TSV) and a dummy TSV penetrating through the substrate;

active metal connections electrically interconnecting the active TSV and the dummy TSV;

a dummy pad configured to be used as a probe pad on a first surface of the substrate, wherein the dummy pad is electrically connected to the active metal connections; and

a dummy solder bump on a second surface of the substrate and electrically connected to the active TSV and the active metal connections, wherein the dummy pad and the dummy solder bump are on opposite surfaces of the interposer;

a first package component bonded to the first surface of the interposer; and

a second package component bonded to the second surface of the interposer, wherein the dummy solder bump is between the interposer and the second package component, and is not electrically connected to conductive features inside the package component.

2. The circuit structure of claim 1 , wherein the first package component is smaller in size than the interposer, and wherein the dummy pad is not covered by the first package component.

3. The circuit structure of claim 2 further comprising a molding compound directly over and contacting the dummy pad.

4. The circuit structure of claim 3 further comprising:

a dummy redistribution line (RDL) electrically connecting the dummy solder bump to the active TSV, wherein the dummy RDL and the active metal connections are on opposite sides of the substrate.

5. The circuit structure of claim 3 further comprising:

a dummy TSV in the substrate and electrically connected between the active metal connections and the dummy solder bump.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 30, 2011
From: LU, HSIANG-TAI; LIN, CHIH-HSIEN; HUNG, WEI-SHO
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 026356/0945 →
Continuity (1)
Related Publication 20120298410A1 · Nov 29, 2012