IP Library Granted Patent US 8,671,324
Granted Patent B2
US 8,671,324 · App. 13/668,665 · Granted Mar 11, 2014

Turbo code interleaver with near optimal performance

Inventors: Mustafa Eroz (Germantown, MD); A. Roger Hammons, Jr. (North Potomac, MD); Feng-Wen Sun (Germantown, MD)
Assignee: DTVG Licensing, Inc.
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Quick Facts
Patent No.
US 8,671,324
App. No.
13/668,665
Granted
Mar 11, 2014
Kind
B2
Abstract

A method of interleaving blocks of indexed data of varying lengths is disclosed. The method includes the steps of: providing a set of basic Interleavers comprising a family of one or more permutations of the indexed data and having a variable length; selecting one of the basic Interleavers based upon a desired Interleaver length L; and adapting the selected basic Interleaver to produce an Interleaver having the desired Interleaver length L.

Claims (11)

1. A turbo encoder comprising:

a first constituent encoder configured to encode input bits in order to generate first parity bits;

an internal interleaver configured to interleave the input bits based on an interleaver matrix in order to generate interleaved bits; and

a second constituent encoder configured to encode the interleaved bits in order to generate second parity bits,

wherein a size of the interleaver matrix is determined based on a total number of the input bits, and

wherein generating the interleaved bits comprises pruning at least one bit output by the interleaver matrix after writing the input bits into the interleaver matrix if a size of the interleaver matrix is larger than the total number of the input bits.

2. The turbo encoder of claim 1 , wherein the size of the interleaver matrix is obtained by multiplying a number of rows of the interleaver matrix by a number of columns of the interleaver matrix.

3. The turbo encoder of claim 1 , wherein the total number of the input bits is equal to a total number of the interleaved bits.

4. The turbo encoder of claim 1 , wherein the internal interleaver is further configured to perform two-dimensional permutation after writing the input bits into the interleaver matrix.

5. The turbo encoder of claim 1 , wherein each of the first and second constituent encoders is an 8-state constituent encoder.

6. The turbo encoder of claim 1 , wherein initial values of shift registers in the first and second constituent encoders are set to all zeros.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 19, 2013
From: THE DIRECTV GROUP, INC.
To: DTVG LICENSING, INC.
Reel/Frame 029833/0363 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 5, 2012
From: EROZ, MUSTAFA; HAMMONS, A. ROGER, JR.; SUN, FENG-WEN
To: HUGHES ELECTRONICS CORPORATION
Reel/Frame 029242/0199 →
CHANGE OF NAME Recorded Nov 5, 2012
From: HUGHES ELECTRONICS CORPORATION
To: THE DIRECTV GROUP, INC.
Reel/Frame 029242/0244 →
Continuity (6)
Continuation 11980917 · Oct 31, 2007
Continuation 11051585 · Mar 30, 2005
Continuation 10024834 · Dec 19, 2001
Division 09375067 · Aug 16, 1999
Provisional Application 60096807 · Aug 17, 1998
Related Publication 20130061109A1 · Mar 7, 2013