Microelectronic device

1. A microelectronic device, comprising:

a thin film transistor including a zinc indium oxide semiconductor channel; and

an organic polymer passivation layer formed on said zinc indium oxide semiconductor channel.

2. The device of claim 1 wherein said organic polymer is chosen from one of a photoresist, SU8, and an organic resin.

3. The device of claim 1 wherein said zinc indium oxide semiconductor channel defines a channel conductance of effectively zero at a turn-on voltage of the thin film transistor.

4. The device of claim 3 wherein said turn-on voltage is a gate voltage in a range of negative fifteen to positive fifteen volts.

5. The device of claim 3 wherein said channel conductance of effectively zero is defined as a channel sheet resistance of not less than 10 8 Ohms Square.

6. The device of claim 1 wherein said thin film transistor further comprises a source and a drain, wherein said semiconductor channel operatively connects said source and said drain, and wherein said source, said drain and said semiconductor channel are formed on a gate dielectric.

7. The device of claim 1 wherein said passivation layer defines a protective coating that protects said zinc indium oxide semiconductor layer during processing.

8. The device of claim 1 wherein said passivation layer defines an interlayer dielectric.

9. A method of making a thin film transistor, comprising:

forming a zinc indium oxide semiconductor channel; and

forming an organic polymer passivation layer on said zinc indium oxide semiconductor channel.

10. The method of claim 9 further comprising further processing said thin film transistor, wherein said passivation layer protects said zinc indium oxide semiconductor channel from said further processing.

11. The method of claim 9 further comprising, prior to forming said organic polymer, annealing said zinc indium oxide semiconductor channel in air at a temperature of at least 150 degrees Celsius.

12. The method of claim 9 further comprising forming a source and a drain, wherein said zinc indium oxide semiconductor channel connects said source and said drain.

13. The method of claim 9 wherein said zinc indium oxide semiconductor channel is formed on a gate dielectric.

14. The method of claim 9 wherein said zinc indium oxide semiconductor channel is formed in an Argon/Oxygen atmosphere having a ratio of 90 Argon to 10 Oxygen (Ar:O 2 90:10) for a time of at least two minutes, at an energy level of at least 140 Watts, and at a pressure of at least 7 mTorr.

15. The method of claim 9 wherein said zinc indium oxide semiconductor channel defines a thickness of at least 10 nm.

16. The method of claim 9 further comprising curing said organic polymer passivation layer at a temperature of at least 90 degrees Celsius.