IP Library Granted Patent US 8,703,620
Granted Patent B2
US 8,703,620 · App. 13/564,071 · Granted Apr 22, 2014

Methods for PFET fabrication using APM solutions

Inventors: Joanna Wasyluk (Dresden, DE); Stephan Kronholz (Dresden, DE); Berthold Reimer (Dresden, DE); Sven Metzger (Dresden, DE); Gregory Nowling (San Jose, CA); John Foster (Mountain View, CA); Paul Besser (Sunnyvale, CA)
Assignee: GLOBALFOUNDRIES, Inc.
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Quick Facts
Patent No.
US 8,703,620
App. No.
13/564,071
Granted
Apr 22, 2014
Kind
B2
Abstract

A method for fabricating an integrated circuit from a semiconductor substrate having formed thereon over a first portion of the semiconductor substrate a hard mask layer and having formed thereon over a second portion of the semiconductor substrate an oxide layer. The first portion and the second portion are electrically isolated by a shallow trench isolation feature. The method includes removing the oxide layer from over the second portion and recessing the surface region of the second portion by applying an ammonia-hydrogen peroxide-water (APM) solution to form a recessed surface region. The APM solution is provided in a concentration of ammonium to hydrogen peroxide ranging from about 1:1 to about 1:0.001 and in a concentration of ammonium to water ranging from about 1:1 to about 1:20. The method further includes epitaxially growing a silicon-germanium (SiGe) layer on the recessed surface region.

Claims (18)

1. A method for fabricating an integrated circuit from a semiconductor substrate having formed thereon over a first portion of the semiconductor substrate a hard mask layer over an active surface of the first portion and having formed thereon over a second portion of the semiconductor substrate an oxide layer over an active surface of the second portion, the first portion and the second portion being electrically isolated by a shallow trench isolation feature, wherein the active surface of the second portion is substantially parallel to the active surface of the first portion, and wherein the hard mask layer extends to a height above the active surface of the first portion that is higher than a height above the active surface of the second portion to which the oxide layer extends, the method comprising:

removing the oxide layer from over the second portion to expose a surface region of the second portion and simultaneously reducing a height of the hard mask layer by applying a dilute hydrogen fluoride etching solution;

recessing the surface region of the second portion by applying an ammonia-hydrogen peroxide-water (APM) solution over both portions to form a recessed surface region, the APM solution being provided in a concentration of ammonium to hydrogen peroxide ranging from about 1:1 to about 1:0.001 and in a concentration of ammonium to water ranging from about 1:1 to about 1:20;

wherein recessing the surface region of the second portion comprises recessing the surface region to a depth between about 2 nm and about 20 nm,

wherein recessing the surface region of the second portion comprises recessing the surface region at a temperature between about 40° C. and about 80° C.; and

epitaxially growing a silicon-germanium (SiGe) layer on the recessed surface region of the second portion,

wherein growing the SiGe comprises growing to a height that is approximately parallel with the active surface of the first portion.

2. The method of claim 1 , wherein recessing the surface region of the second portion comprises recessing the surface region for a time period between about 5 minutes and about 60 minutes.

3. The method of claim 1 , further comprising cleaning the recessed surface region subsequent to recessing the surface region of the second portion by applying a second dilute hydrogen fluoride solution.

4. The method of claim 1 , wherein applying the dilute hydrogen fluoride etching solution comprises applying an about 1:300 dilute hydrogen fluoride etching solution.

5. A method for fabricating an integrated circuit from a semiconductor substrate having formed thereon over a first portion of the semiconductor substrate a hard mask layer and having formed thereon over a second portion of the semiconductor substrate an oxide layer, the first portion and the second portion being electrically isolated by a shallow trench isolation feature, the method comprising:

removing the oxide layer from over the second portion to a surface region of the second portion and recessing the surface region of the second portion in a single process step by applying a solution of about 1:300 dilute hydrogen fluoride solution and one or more of: choline hydroxide, ammonium hydroxide, tetraethylammonium hydroxide, sulfolane, a mixture of hydroxylamine and quaternary ammonium hydroxide, and ammonia-hydrogen peroxide-water (APM) to form a recessed surface region, wherein if an APM solution is applied, the APM solution being provided in a concentration of ammonium to hydrogen peroxide ranging from about 1:10 to about 1:0.001 and in a concentration of ammonium to water ranging from about 1:1 to about 1:20; and

epitaxially growing a silicon-germanium (SiGe) layer on the recessed surface region to a height approximating a surface region of the first portion below the hard mask layer.

6. The method of claim 5 , wherein recessing the surface region of the second portion comprises recessing the surface region to a depth between about 2 nm to about 20 nm.

7. The method of claim 6 , wherein recessing the surface region of the second portion comprises recessing the surface region to a depth between about 4 nm to about 8 nm.

8. The method of claim 5 , wherein recessing the surface region of the second portion comprises recessing the surface region at a temperature between about 40° C. and about 80° C.

9. The method of claim 5 , wherein recessing the surface region of the second portion comprises recessing the surface region for a time period between about 5 minutes and about 60 minutes.

10. The method of claim 5 , further comprising cleaning and hydrogen termination of the recessed surface region subsequent to recessing the surface region of the second portion by applying a second dilute hydrogen fluoride solution.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Nov 20, 2020
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: GLOBALFOUNDRIES INC.
Reel/Frame 054636/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 17, 2020
From: GLOBALFOUNDRIES INC.
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 054452/0776 →
SECURITY AGREEMENT Recorded Nov 29, 2018
From: GLOBALFOUNDRIES INC.
To: WILMINGTON TRUST, NATIONAL ASSOCIATION
Reel/Frame 049490/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE: GLOBALFOUNDRIES INC. PREVIOUSLY RECORDED ON REEL 028697 FRAME 0549. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNEE: GLOBALFOUNDRIES SINGAPORE. Recorded Dec 21, 2012
From: WASYLUK, JOANNA; KRONHOLZ, STEPHAN; REIMER, BERTHOLD; METZGER, SVEN; NOWLING, GREGORY; FOSTER, JOHN; BESSER, PAUL
To: GLOBALFOUNDRIES SINGAPORE
Reel/Frame 029531/0611 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 1, 2012
From: WASYLUK, JOANNA; KRONHOLZ, STEPHAN; REIMER, BERTHOLD; METZGER, SVEN; NOWLING, GREGORY; FOSTER, JOHN; BESSER, PAUL
To: GLOBALFOUNDRIES INC.
Reel/Frame 028697/0549 →
Continuity (2)
Continuation In Part 13368055 · Feb 7, 2012
Related Publication 20130203245A1 · Aug 8, 2013