IP Library › Granted Patent US 8,709,865
Granted Patent B2
US 8,709,865 · App. 13/588,030 · Granted Apr 29, 2014

Fabrication method of packaging substrate having through-holed interposer embedded therein

Inventors: Yu-Shan Hu (Taoyuan, TW); Dyi-Chung Hu (Taoyuan, TW); Tzyy-Jang Tseng (Taoyuan, TW)
Assignee: Unimicron Technology Corporation
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Quick Facts
Patent No.
US 8,709,865
App. No.
13/588,030
Granted
Apr 29, 2014
Kind
B2
Abstract

A packaging substrate having a through-holed interposer embedded therein and a fabrication method of the packaging substrate are provided, where the packaging substrate includes: a molding layer having opposite first and second surfaces; a through-holed interposer embedded in the molding layer and flush with the second surface; a redistribution-layer structure embedded in the molding layer and disposed on the through-holed interposer and having a plurality of electrode pads exposed from the first surface of the molding layer; and a built-up structure disposed on the second surface of the molding layer and electrically connected to the through-holed interposer.

Claims (28)

1. A fabrication method of a packaging substrate having a through-holed interposer embedded therein, comprising the steps of:

providing a through-holed interposer having a redistribution-layer structure disposed thereon, wherein the through-holed interposer has a first side and an opposite second side and a plurality of conductive through holes penetrating the first side and the second side, each of the conductive through holes has a first end surface on the first side and a second end surface on the second side, the redistribution-layer structure is formed on the first side of the through-holed interposer and the first end surfaces of the conductive through holes and electrically connected to the first end surfaces of the conductive through holes, the second end surfaces of the conductive through holes are flush with the second side of the through-holed interposer so as to allow the second side and the second end surfaces of the conductive through holes to be attached to a carrier board, and an outermost layer of the redistribution-layer structure has a plurality of electrode pads;

forming a molding layer on the carrier board and the redistribution-layer structure so as to embed the through-holed interposer in the molding layer, wherein the molding layer has an exposed first surface and a second surface attached to the carrier board;

forming a metal layer on the first surface of the molding layer;

removing the carrier board to expose the second surface of the molding layer, the second side of the through-holed interposer and the second end surfaces of the conductive through holes;

forming a built-up structure on the second surface of the molding layer, the second side of the through-holed interposer, and the second end surfaces of the conductive through holes, wherein the built-up structure comprises a plurality of conductive vias, wherein a portion of the conductive vias are electrically connected to the second end surfaces of the conductive through holes;

removing the metal layer to expose the first surface of the molding layer; and

forming a plurality of first openings on the first surface of the molding layer for exposing the electrode pads, respectively.

2. The method of claim 1 , wherein the through-holed interposer is made of single crystal silicon or polysilicon, the fabrication process of the through-holed interposer and the redistribution-layer structure comprising the steps of:

providing a substrate having a plurality of recesses;

forming an insulating layer on the substrate and a side wall of each of the recesses, a side of the substrate having the insulating layer being defined as the first side;

filling in the recesses with a metal material to form the conductive through holes, allowing the first end surfaces of the conductive through holes to be exposed from the first side and flush with the first side;

forming the redistribution-layer structure on the first side and the first end surfaces of the conductive through holes, wherein the redistribution-layer structure is electrically connected to the first end surfaces of the conductive through holes and the outermost layer of the redistribution-layer structure is formed with a plurality of electrode pads; and

removing a portion of the substrate below the recesses to form the second side of the through-holed interposer, so as for the second end surfaces of the conductive through holes to be exposed from the second side.

3. The method of claim 1 , wherein the through-holed interposer is made of glass or ceramic, and the fabrication process of the through-holed interposer and the redistribution-layer structure comprises the steps of:

providing a substrate having one surface defined as the first side and a plurality of recesses formed on the first side;

filling in the recesses with a metal material so as to form the conductive through holes, the first end surfaces of the conductive through holes being exposed from the first side and flush with the first side;

forming the redistribution-layer structure on the first side and the first end surfaces of the conductive through holes, wherein the redistribution-layer structure is electrically connected to the first end surfaces of the conductive through holes and the outermost layer of the redistribution-layer structure is formed with a plurality of electrode pads; and

removing a portion of the substrate below the recesses to form the second side of the through-holed interposer, so as for the second end surfaces of the conductive through holes to be exposed from the second side.

4. The method of claim 1 , wherein the through-holed interposer has a thickness between 75 μm and 150 μm.

5. The method of claim 1 , wherein the built-up structure further comprises at least a dielectric layer and a wiring layer formed on the dielectric layer, and the conductive vias are disposed in the dielectric layer for electrically connecting the wiring layer and the second end surfaces of the conductive through holes.

6. The method of claim 5 , further comprising the step of forming an insulating protection layer on the built-up structure and forming in the insulating protection layer a plurality of second openings through which portions of the wiring layer are exposed to serve as conductive pads.

7. The method of claim 1 , further comprising the step of forming an antenna structure on the first surface of the molding layer.

8. The method of claim 1 , further comprising the step of attaching a first electronic component on the carrier board so as to embed the first electronic component in the molding layer and electrically connect the first electronic component to the built-up structure.

9. The method of claim 8 , wherein the first electronic component is an active component, a passive component or an integrated passive component.

10. The method of claim 1 , further comprising the step of attaching on the carrier board a second electronic component having a plurality of conductive pads in a manner that the second electronic component is embedded in the molding layer and the conductive pads of the second electronic component are exposed from the molding layer.

11. The method of claim 10 , wherein the second electronic component is an active component, a passive component or an integrated passive component.

12. The method of claim 1 , further comprising the step of disposing a heat sink on the first surface of the molding layer, wherein the heat sink has an open region for exposing the electrode pads of the redistribution-layer and for receiving an electronic component.

Priority Claims (1)
TW 99143617 A · Dec 14, 2010 · national
Continuity (2)
Division 13074467 · Mar 29, 2011
Related Publication 20130040427A1 · Feb 14, 2013