IP Library Granted Patent US 8,710,632
Granted Patent B2
US 8,710,632 · App. 13/606,007 · Granted Apr 29, 2014

Compound semiconductor epitaxial structure and method for fabricating the same

Inventors: Tien-Wei Yu (Kaohsiung, TW); Chin-Cheng Chien (Tainan, TW); I-Ming Lai (Kaohsiung, TW); Shin-Chi Chen (Penghu County, TW); Chih-Yueh Li (Taipei, TW); Fong-Lung Chuang (Hsinchu, TW); Chin-I Liao (Tainan, TW); Kuan-Yu Lin (Taichung, TW)
Assignee: United Microelectronics Corp.
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Quick Facts
Patent No.
US 8,710,632
App. No.
13/606,007
Granted
Apr 29, 2014
Kind
B2
Abstract

A method for fabricating a compound semiconductor epitaxial structure includes the following steps. Firstly, a first compound epitaxial layer is formed on a substrate. Then, a continuous epitaxial deposition process is performed to form a second compound epitaxial layer on the first compound epitaxial layer, so that the second compound epitaxial layer has a linearly-decreased concentration gradient of metal. Afterwards, a semiconductor material layer is formed on the second compound epitaxial layer.

Claims (25)

1. A method for fabricating a compound semiconductor epitaxial structure, comprising steps of:

forming an undoped silicon germanium layer having a linearly-increased concentration gradient of germanium on a substrate;

forming a first compound epitaxial layer on the undoped silicon germanium layer;

performing a continuous epitaxial deposition process to form a second compound epitaxial layer on the first compound epitaxial layer, so that the second compound epitaxial layer has a linearly-decreased concentration gradient of metal; and

forming a semiconductor material layer on the second compound epitaxial layer.

2. The method according to claim 1 , wherein the first compound epitaxial layer has a metal concentration greater than or equal to an initial concentration of the linearly-decreased concentration gradient of metal.

3. The method according to claim 1 , wherein during the step of performing the continuous epitaxial deposition process to form the second compound epitaxial layer, the flow rate of a metal-containing reactive gas is controlled to be linearly decreased.

4. The method according to claim 3 , wherein forming the second compound epitaxial layer further comprises keeping the flow rate of the metal-containing reactive gas constant for a predetermined interval of time.

5. The method according to claim 4 , wherein the first compound epitaxial layer is a silicon germanium bulk layer, and the metal-containing reactive gas comprises a germane gas.

6. The method according to claim 5 , wherein during the step of performing the continuous epitaxial deposition process to form the second compound epitaxial layer, adjusting the flow rates of the germane gas, a hydrogen chloride gas and a diborane gas using a mass flow controller, so that the flow rate of the germane gas is linearly decreased.

7. The method according to claim 5 , wherein the first compound epitaxial layer is further boron-doped.

8. The method according to claim 7 , wherein during the step of forming the undoped silicon germanium layer, adjusting the flow rates of the germane gas and a hydrogen chloride gas using a mass flow controller, so that the flow rate of the germane gas is linearly increased or is kept constant for a predetermined interval of time.

9. The method according to claim 1 , wherein the step of forming the first compound epitaxial layer and the step of forming the second compound epitaxial layer are carried out at the same temperature.

10. A compound semiconductor epitaxial structure, comprising:

a substrate;

a first compound epitaxial layer formed on a substrate;

an undoped silicon germanium layer having a linearly-increased concentration gradient of germanium arranged between the substrate and the first compound epitaxial layer;

a second compound epitaxial layer formed on the first compound epitaxial layer, wherein the second compound epitaxial layer has a linearly-decreased concentration gradient of metal; and

a semiconductor material layer formed on the second compound epitaxial layer.

11. The compound semiconductor epitaxial structure according to claim 10 , wherein the first compound epitaxial layer has a metal concentration greater than or equal to an initial concentration of the linearly-decreased concentration gradient of metal of the second compound epitaxial layer.

12. The compound semiconductor epitaxial structure according to claim 10 , wherein the first compound epitaxial layer is a silicon germanium bulk layer, which contains 40 wt % of germanium and is doped with 25 wt % of boron, wherein the second compound epitaxial layer has a linearly-decreased concentration gradient of germanium.

13. The compound semiconductor epitaxial structure according to claim 10 , wherein a top surface of the first compound epitaxial layer is higher than the substrate by a height difference.

14. The compound semiconductor epitaxial structure according to claim 13 , wherein the height difference between the top surface of the first compound epitaxial layer and the substrate is in a range between 150 Å and 170 Å.

15. The compound semiconductor epitaxial structure according to claim 10 , wherein the second compound epitaxial layer has a thickness smaller than 100 Å.

16. The compound semiconductor epitaxial structure according to claim 15 , wherein the thickness of the second compound epitaxial layer is in a range between 30 Å and 100 Å.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 7, 2012
From: YU, TIEN-WEI; CHIEN, CHIN-CHENG; LAI, I-MING; CHEN, SHIN-CHI; LI, CHIH-YUEH; CHUANG, FONG-LUNG; LIAO, CHIN-I; LIN, KUAN-YU
To: UNITED MICROELECTRONICS CORPORATION
Reel/Frame 028911/0962 →
Continuity (1)
Related Publication 20140070377A1 · Mar 13, 2014