IP Library › Granted Patent US 8,722,441
Granted Patent B2
US 8,722,441 · App. 13/489,955 · Granted May 13, 2014

Manufacturing process for solid state lighting device on a conductive substrate

Inventors: Shaoher X. Pan (San Jose, CA); Jay Chen (Saratoga, CA)
Assignee: SiPhoton Inc.
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Quick Facts
Patent No.
US 8,722,441
App. No.
13/489,955
Granted
May 13, 2014
Kind
B2
Abstract

A method for fabricating a light emitting device includes forming a trench in a first surface on first side of a substrate. The trench comprises a first sloped surface not parallel to the first surface, wherein the substrate has a second surface opposite to the first surface of the substrate. The method also includes forming alight emission layer over the first trench surface, but not over the remainder of the first substrate surface, and removing at least a portion of the substrate from the second side of the substrate to expose the light emission layer and allow it to emit light out of the protrusion or protrusions on the second side of the substrate. These protrusions may be elongated pyramids.

Claims (26)

1. A method for fabricating a light emitting device, comprising:

forming a trench in a first surface of a silicon substrate having the first surface and a second surface opposite to the first surface, leaving a portion of the first surface and a substrate exposed, the trench having a first sloped surface not parallel to the first or second surfaces of the substrate;

forming a light emission layer over the first sloped surfaced of the trench, but not over portion of the first surface of the substrate exposed; and

completely removing the substrate from the second surface of the substrate to expose the light emission layer within the first sloped of the trench, but not over the portion of the first surface of the substrate.

2. The method of claim 1 further comprising the step of forming a reflective layer over the exposed light emission layer.

3. The method of claim 1 , further comprising:

forming a base electrode layer over the light emission layer before the step of removing a sufficient portion of the substrate from the second surface of the substrate, wherein the base electrode layer at least partially fills the trench on the first surface of the substrate.

4. The method of claim 2 , further comprising:

forming a base electrode layer over the reflective layer before the step of removing a sufficient portion of the substrate from the second surface of the substrate, wherein the base electrode layer at least partially fills the trench in the first surface of the substrate.

5. The method of claim 3 , wherein the base electrode layer is formed by electroplating or deposition.

6. The method of claim 4 , wherein the base electrode layer is formed by electroplating or deposition.

7. The method of claim 3 , wherein the base electrode layer comprises a metallic material or a conducting polymer.

8. The method of claim 4 , wherein the base electrode layer comprises a metallic material or a conducting polymer.

9. The method of claim 1 , further comprising a step of forming a transparent conductive layer over the exposed light emission layer.

10. The method of claim 2 , further comprising a step of forming a transparent conductive layer over the exposed light emission layer.

11. The method of claim 3 further comprising a step of forming a transparent conductive layer over the exposed light emission layer.

12. The method of claim 11 , wherein the light emission layer is configured to emit light in response to an electric current flowing across the base electrode layer and the transparent conductive layer.

13. The method of claim 1 , wherein the first surface of the substrate is substantially parallel to a (100) crystal plane of the substrate, and wherein the first sloped surface of the trench is substantially parallel to a (111) crystal plane of the substrate.

14. The method of claim 1 , wherein the light emission layer comprises at least one quantum well formed by Group III-V compounds.

15. The method of claim 14 , wherein the quantum well comprises:

a first III-V layer;

a quantum-well layer on the first III-V layer; and

a second III-V layer on the quantum well layer.

16. The method of claim 1 , further comprising forming a buffer layer on the first sloped surface before the step of forming light emission layer, wherein the light emission layer is formed on the buffer layer.

17. The method of claim 16 , wherein the buffer layer comprises a material selected from the group consisting of GaN, ZnO, AlN, HfN MN, AlAs, SiCN, TaN, and SiC.

18. The method of claim 1 , wherein the step of removing forms a protrusion on the second surface of the substrate, wherein the protrusion has the shape of a pyramid, a truncated pyramid or an elongated pyramid, wherein the first sloped surface is a substantially flat face in part defining the pyramid, the truncated pyramid or the elongated pyramid.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 22, 2012
From: PAN, SHAOHER X.; CHEN, JAY
To: SIPHOTON INC.
Reel/Frame 028430/0347 →
Continuity (3)
Continuation In Part 12782080 · May 18, 2010
Continuation In Part 12691269 · Jan 21, 2010
Related Publication 20120241809A1 · Sep 27, 2012