Solid-state imaging device and electronic apparatus
A solid-state imaging device includes a pixel region in which shared pixels which share pixel transistors in a plurality of photoelectric conversion portions are two-dimensionally arranged. The shared pixel transistors are divisionally arranged in a column direction of the shared pixels, the pixel transistors shared between neighboring shared pixels are arranged so as to be horizontally reversed or/and vertically crossed, and connection wirings connected to a floating diffusion portion, a source of a reset transistor and a gate of an amplification transistor in the shared pixels are arranged along the column direction.
1. A solid-state imaging device comprising a pixel region in which shared pixels which share pixel transistors in a plurality of photoelectric conversion portions are two-dimensionally arranged, wherein:
the shared pixel transistors are divisionally arranged in a column direction of the shared pixels,
the pixel transistors shared between neighboring shared pixels are arranged so as to be horizontally reversed such that at least one shared pixel transistor in a first column and at least one shared pixel transistor in an adjacent second column are bilaterally symmetric about a common diffusion portion, and
connection wirings connected to a floating diffusion portion, a source of a reset transistor and a gate of an amplification transistor in the shared pixels are arranged along the column direction.
2. The solid-state imaging device according to claim 1 , wherein the pixel transistors include any one of three transistors including a transfer transistor, a reset transistor and an amplification transistor or four transistors including a transfer transistor, a reset transistor, an amplification transistor and a selection transistor.
3. The solid-state imaging device according to claim 2 , wherein the shared pixels have a configuration in which four photoelectric conversion portions are arranged in a zigzag in the column direction, two photoelectric conversion portions share one floating gate portion, and a serial circuit of the amplification transistor and the selection transistor and the reset transistor are divisionally arranged in the column direction.
4. The solid-state imaging device according to claim 2 , wherein the shared pixels have a configuration in which four photoelectric conversion portions are arranged in a zigzag in the column direction, every two photoelectric conversion portions share one floating gate portion, and the amplification transistor and the reset transistor are divisionally arranged in the column direction.
5. The solid-state imaging device according to claim 2 , wherein the shared pixels have a configuration in which four photoelectric conversion portions are arranged in the column direction, every two photoelectric conversion portions share one floating gate portion, and a serial circuit of the amplification transistor and the selection transistor and the reset transistor are divisionally arranged in the column direction.
6. The solid-state imaging device according to claim 2 , wherein the shared pixels have a configuration in which four photoelectric conversion portions are arranged in the column direction, every two photoelectric conversion portions share one floating gate portion, and the amplification transistor and the reset transistor are divisionally arranged in the column direction.
7. The solid-state imaging device according to claim 2 , wherein the shared pixels have a configuration in which two photoelectric conversion portions are arranged in the column direction, and a serial circuit of the amplification transistor and the selection transistor and the reset transistor are divisionally arranged in the column direction.
8. The solid-state imaging device according to claim 2 , wherein the shared pixels have a configuration in which two photoelectric conversion portions are arranged in the column direction, and the amplification transistor and the reset transistor are divisionally arranged in the column direction.
9. The solid-state imaging device according to claim 2 , wherein the shared pixels have a configuration in which 2×2 photoelectric conversion portions, that is, four photoelectric conversion portions, are provided, four photoelectric conversion portions share one floating gate portion, and a serial circuit of the amplification transistor and the selection transistor and the reset transistor are divisionally arranged in the column direction.
10. The solid-state imaging device according to claim 2 , wherein the shared pixels have a configuration in which 2×2 photoelectric conversion portions, that is, four photoelectric conversion portions, are provided, four photoelectric conversion portions share one floating gate portion, and the amplification transistor and the reset transistor are divisionally arranged in the column direction.
11. An electronic apparatus comprising:
a solid-state imaging device;
an optical system configured to guide incident light to a photoelectric conversion portion of the solid-state imaging device; and
a signal processing circuit configured to process an output signal of the solid-state imaging device,
wherein the solid-state imaging device includes a pixel region in which shared pixels which share pixel transistors in a plurality of photoelectric conversion portions are two-dimensionally arranged, wherein:
the shared pixel transistors are divisionally arranged in a column direction of the shared pixels,
the pixel transistors shared between neighboring shared pixels are arranged so as to be horizontally reversed such that at least one shared pixel transistor in a first column and at least one shared pixel transistor in an adjacent second column are bilaterally symmetric about a common diffusion portion, and
connection wirings connected to a floating diffusion portion, a source of a reset transistor and a gate of an amplification transistor in the shared pixels are arranged along the column direction.
12. The electronic apparatus according to claim 11 , wherein the pixel transistors include any one of three transistors including a transfer transistor, a reset transistor and an amplification transistor or four transistors including a transfer transistor, a reset transistor, an amplification transistor and a selection transistor.
13. The electronic apparatus according to claim 12 , wherein the shared pixels have a configuration in which four photoelectric conversion portions are arranged in a zigzag in the column direction, two photoelectric conversion portions share one floating gate portion, and a serial circuit of the amplification transistor and the selection transistor and the reset transistor are divisionally arranged in the column direction.
14. The electronic apparatus according to claim 12 , wherein the shared pixels have a configuration in which four photoelectric conversion portions are arranged in a zigzag in the column direction, every two photoelectric conversion portions share one floating gate portion, and the amplification transistor and the reset transistor are divisionally arranged in the column direction.
15. The electronic apparatus according to claim 12 , wherein the shared pixels have a configuration in which four photoelectric conversion portions are arranged in the column direction, every two photoelectric conversion portions share one floating gate portion, and a serial circuit of the amplification transistor and the selection transistor and the reset transistor are divisionally arranged in the column direction.
16. The electronic apparatus according to claim 12 , wherein the shared pixels have a configuration in which four photoelectric conversion portions are arranged in the column direction, every two photoelectric conversion portions share one floating gate portion, and the amplification transistor and the reset transistor are divisionally arranged in the column direction.
17. The electronic apparatus according to claim 12 , wherein the shared pixels have a configuration in which two photoelectric conversion portions are arranged in the column direction, and a serial circuit of the amplification transistor and the selection transistor and the reset transistor are divisionally arranged in the column direction.
18. The electronic apparatus according to claim 12 , wherein the shared pixels have a configuration in which two photoelectric conversion portions are arranged in the column direction, and the amplification transistor and the reset transistor are divisionally arranged in the column direction.
19. The electronic apparatus according to claim 12 , wherein the shared pixels have a configuration in which 2×2 photoelectric conversion portions, that is, four photoelectric conversion portions, are provided, four photoelectric conversion portions share one floating gate portion, and a serial circuit of the amplification transistor and the selection transistor and the reset transistor are divisionally arranged in the column direction.
20. The electronic apparatus according to claim 12 , wherein the shared pixels have a configuration in which 2×2 photoelectric conversion portions, that is, four photoelectric conversion portions, are provided, four photoelectric conversion portions share one floating gate portion, and the amplification transistor and the reset transistor are divisionally arranged in the column direction.