IP Library › Granted Patent US 8,729,611
Granted Patent B2
US 8,729,611 · App. 13/503,693 · Granted May 20, 2014

Semiconductor device having a plurality of fins with different heights and method for manufacturing the same

Inventors: Huilong Zhu (Poughkeepsie, NY); Haizhou Yin (Poughkeepsie, NY); Zhijiong Luo (Poughkeepsie, NY)
Assignee: Institute of Microelectronics, Chinese Academy of Sciences
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Quick Facts
Patent No.
US 8,729,611
App. No.
13/503,693
Granted
May 20, 2014
Kind
B2
Abstract

The present disclosure provides a semiconductor device and a method for manufacturing the same. The semiconductor device comprises: a semiconductor layer comprising a plurality of semiconductor sub-layers; and a plurality of fins formed in the semiconductor layer and adjoining the semiconductor layer, wherein at least two of the plurality of fins comprise different numbers of the semiconductor sub-layers and have different heights. According to the present disclosure, a plurality of semiconductor devices with different dimensions and different driving abilities can be integrated on a single wafer.

Claims (9)

1. A semiconductor device, comprising:

a semiconductor layer comprising a plurality of semiconductor sub-layers; and

a plurality of fins formed in the semiconductor layer and adjoining the semiconductor layer,

wherein at least two of the plurality of fins comprise different number of the semiconductor sub-layers and have different heights.

2. The semiconductor device according to claim 1 , wherein adjacent semiconductor sub-layers of the plurality of semiconductor sub-layers are made of different materials, such that the adjacent semiconductor sub-layers have etching selectivities with respect to each other.

3. The semiconductor device according to claim 1 , further comprising gate stacks being formed astride respective ones of the plurality of fins.

4. The semiconductor device according to claim 2 , wherein the semiconductor layer comprises alternately stacked fin-body material sub-layers and etching-stop sub-layers, wherein thicknesses of the fin-body material sub-layers are larger than those of the etching-stop sub-layers.

5. The semiconductor device according to claim 4 , wherein the fin-body material sub-layers comprise Si, and the etching-stop sub-layers comprise SiGe.

6. The semiconductor device according to claim 3 , wherein the gate stacks are isolated from the semiconductor layer by an isolation layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 1, 2012
From: ZHU, HUILONG; YIN, HAIZHOU; LUO, ZHIJIONG
To: INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OF SCIENCES
Reel/Frame 028134/0271 →
Priority Claims (1)
CN 2011 1 0265073 · Sep 8, 2011 · national
Continuity (1)
Related Publication 20130062672A1 · Mar 14, 2013