Backward analysis for determining fault masking factors
A method and a system for determining the observability of faults in an electronic circuit include a processor that simulates, in a simulation phase, a behavior of the electronic circuit using a simulation model, and that determined, in an analysis phase, based on the simulation, and for each of a plurality of elements of the electronic circuit, time periods in which an occurrent fault could cause a deviation in analysis output signals, where the occurrent fault is determined not to cause any deviation in output signals in other time periods.
1. A method for determining an observability of faults in an electronic circuit, comprising:
simulating, by a computer processor and in a first step, which is in a simulation phase, a behavior of the electronic circuit using a simulation model; and
determining, by the processor in a second step, which is in an analysis phase, based on the simulating, and for each of a plurality of elements of the electronic circuit, time periods in which an occurrent fault could cause a deviation in analysis output signals, the occurrent fault determined not to cause any deviation in output signals in other time periods.
2. The method as recited in claim 1 , wherein in the simulation phase, delays are used that are taken into account in the analysis phase.
3. The method as recited in claim 1 , wherein in the simulation phase, no delays are used, and in the analysis phase, a computational integration of the delays takes place.
4. The method as recited in claim 1 , wherein the simulating is carried out in a forward direction.
5. The method as recited in claim 1 , wherein the simulating is carried out in a backward direction.
6. The method as recited in claim 1 , wherein an initial state of the relevance for an end of a simulation time is determined for all of the elements.
7. The method as recited in claim 1 , wherein the method is used to determine fault masking factors for the elements in the electronic circuit.
8. The method as recited in claim 1 , wherein the method is used to determine fault coverage of test patterns.
9. A system for determining an observability of faults in an electronic circuit, the system comprising:
a computer processor configured to:
simulate a behavior of the electronic circuit using a simulation model; and
determine, for each of a plurality of elements of the electronic circuit and based on the simulation, time periods in which an occurrent fault could cause a deviation in analysis output signals, the occurrent fault determined not to cause any deviation in output signals in other time periods.