Tunable schottky diode with depleted conduction path
A device includes a semiconductor substrate, first and second electrodes supported by the semiconductor substrate, laterally spaced from one another, and disposed at a surface of the semiconductor substrate to form an Ohmic contact and a Schottky junction, respectively. The device further includes a conduction path region in the semiconductor substrate, having a first conductivity type, and disposed along a conduction path between the first and second electrodes, a buried region in the semiconductor substrate having a second conductivity type and disposed below the conduction path region, and a device isolating region electrically coupled to the buried region, having the second conductivity type, and defining a lateral boundary of the device. The device isolating region is electrically coupled to the second electrode such that a voltage at the second electrode during operation is applied to the buried region to deplete the conduction path region.
1. A device comprising:
a semiconductor substrate;
first and second electrodes supported by the semiconductor substrate, laterally spaced from one another, and disposed at a surface of the semiconductor substrate to form an Ohmic contact and a Schottky junction, respectively;
a conduction path region in the semiconductor substrate, having a first conductivity type, and disposed along a conduction path between the first and second electrodes;
a buried region in the semiconductor substrate having a second conductivity type and disposed below the conduction path region; and
a device isolating region electrically coupled to the buried region, having the second conductivity type, and defining a lateral boundary of the device;
wherein the device isolating region is electrically coupled to the second electrode such that a voltage at the second electrode during operation is applied to the buried region to deplete the conduction path region.
2. The device of claim 1 , wherein the buried region extends across an active area of the device.
3. The device of claim 1 , further comprising:
a buried device isolating layer in the semiconductor substrate, having the second conductivity type, and extending across an active area of the device; and
a link region in the semiconductor substrate having the second conductivity type and disposed between the device isolating region and the buried device isolating layer;
wherein the buried region and the link region have a common dopant profile.
4. The device of claim 1 , further comprising an upper junction field effect transistor (JFET) gate region in the semiconductor substrate, having the second conductivity type, and electrically coupled to the second electrode, wherein the buried region is configured as a lower JFET gate region with the conduction path passing between the upper and lower JFET gate regions.
5. The device of claim 4 , wherein the upper and lower JFET gate regions are laterally spaced from one another.
6. The device of claim 4 , wherein the upper and lower JFET gate regions laterally overlap one another.
7. The device of claim 1 , wherein the buried region is one of a plurality of buried islands laterally spaced from one another in the semiconductor substrate, having the second conductivity type, disposed below the conduction path region, and electrically coupled to the second electrode.
8. The device of claim 7 , further comprising an isolation trench in the semiconductor substrate adjacent the first electrode, wherein the conduction path region is disposed between the isolation trench and the ring-shaped buried region.
9. The device of claim 1 , wherein the buried region is ring-shaped.
10. The device of claim 1 , wherein the conduction path region is a first Schottky diode semiconductor region of a plurality of Schottky diode semiconductor regions in the semiconductor substrate, having the first conductivity type, and disposed along the conduction path between the first and second electrodes.
11. The device of claim 10 , wherein:
a second Schottky diode semiconductor region of the plurality of Schottky diode semiconductor regions is adjacent the first electrode;
a third Schottky diode semiconductor region of the plurality of Schottky diode semiconductor regions is disposed between the first and second Schottky diode semiconductor regions; and
the third Schottky diode semiconductor region has a lower dopant concentration level than the first and second Schottky diode semiconductor regions.
12. The device of claim 10 , wherein:
a second Schottky diode semiconductor region of the plurality of Schottky diode semiconductor regions is adjacent the first electrode; and
the first and second Schottky diode semiconductor regions have different dopant concentration levels.
13. The device of claim 1 , wherein the buried region is electrically tied to the second electrode.
14. The device of claim 1 , wherein the buried region is electrically tied to the second electrode via the device isolating region.
15. A Schottky diode comprising:
a semiconductor substrate;
first and second electrodes supported by the semiconductor substrate, laterally spaced from one another, and disposed at a surface of the semiconductor substrate to form an Ohmic contact and a Schottky junction, respectively;
a conduction path region in the semiconductor substrate, having a first conductivity type, and disposed along a conduction path between the first and second electrodes;
wherein the conduction path region is configured as a channel of an integrated junction field effect transistor (JFET) structure in the semiconductor substrate, the JFET structure comprising:
a buried gate region having a second conductivity type and disposed below the conduction path region;
a device isolating region electrically coupled to the buried gate region, having the second conductivity type, and defining a lateral boundary of an active area of the Schottky diode;
a buried device isolating layer having the second conductivity type and extending across the active area of the Schottky diode; and
a link region having the second conductivity type, disposed between the device isolating region and the buried device isolating layer, and sharing a common dopant profile with the buried gate region;
wherein the device isolating region is electrically coupled to the second electrode such that a voltage at the second electrode during operation is applied to the buried gate region to deplete the conduction path region.
16. The Schottky diode of claim 15 , wherein the JFET structure comprises an upper gate region having the second conductivity type and electrically coupled to the second electrode, wherein the conduction path passes between the upper and buried gate regions.
17. The Schottky diode of claim 15 , wherein the buried gate region is one of a plurality of buried gate islands laterally spaced from one another, having the second conductivity type, disposed below the conduction path region, and electrically coupled to the second electrode.
18. The Schottky diode of claim 15 , wherein the buried gate region is electrically tied to the second electrode.
19. The Schottky diode of claim 15 , wherein the buried gate region is electrically tied to the second electrode via the device isolating region.