IP Library › Granted Patent US 8,736,018
Granted Patent B2
US 8,736,018 · App. 13/314,575 · Granted May 27, 2014

Semiconductor devices and methods of manufacturing semiconductor devices

Inventors: Kyoung-Hee Kim (Incheon, KR); Gil-Heyun Choi (Seoul, KR); Kyu-Hee Han (Hwaseong-si, KR); Byung-Lyul Park (Seoul, KR); Byung-Hee Kim (Seoul, KR); Sang-Hoon Ahn (Hwaseong-si, KR); Kwang-Jin Moon (Suwon-si, KR)
Assignee: Samsung Electronics Co., Ltd.
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Quick Facts
Patent No.
US 8,736,018
App. No.
13/314,575
Granted
May 27, 2014
Kind
B2
Abstract

A semiconductor device comprises a top surface having a first contact, a bottom surface having a second contact, a via hole penetrating a substrate, an insulation layer structure on a sidewall of the via hole, the insulation layer structure having an air gap therein, a through electrode having an upper surface and a lower surface on the insulation layer structure, the through electrode filling the via hole and the lower surface being the second contact, and a metal wiring electrically connected to the upper surface of the through electrode and electrically connected to the first contact.

Claims (21)

1. A semiconductor device, comprising:

a substrate having a first surface and a second surface opposite to the first surface;

a circuit pattern disposed on the second surface of the substrate;

an insulating interlayer disposed on the second surface of the substrate;

a via hole penetrating the substrate and the insulating interlayer;

an insulation layer structure disposed on an inner sidewall of the via hole and on a top surface of the insulating interlayer, the insulation layer structure having a single layer and including an air gap completely embedded within the single layer;

a through electrode including a first surface and a second surface opposite to the first surface of the through electrode, wherein the through electrode is disposed on the insulation layer structure and fills the via hole, and the first surface of the through electrode is level with the first surface of the substrate; and

a metal wiring disposed on the second surface of the through electrode.

2. The semiconductor device claim 1 , wherein the insulation layer structure includes silicon oxide or carbon-doped silicon oxide.

3. The semiconductor device claim 1 , wherein the air gap has a shape whose gap width gradually increases in a direction toward the bottom surface.

4. A multi-stacked semiconductor device, comprising:

a first semiconductor device comprising:

a top surface,

a bottom surface,

a through electrode having an upper surface and a lower surface, wherein the lower surface is at the same level with the bottom surface,

an insulation layer structure disposed on a sidewall of the through electrode, the insulation layer structure having a single layer and having an air gap completely embedded in the single layer, and

a first metal wiring electrically connected to the upper surface of the through electrode; and

a second semiconductor device comprising:

a contact pad having an upper surface, the upper surface contacting the lower surface of the through electrode; and

a second metal wiring electrically connected to a bottom surface of the contact pad.

5. The semiconductor device claim 4 , wherein the air gap has a shape whose gap width gradually increases in a direction toward the bottom surface.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 8, 2011
From: KIM, KYOUNG-HEE; CHOI, GIL-HEYUN; HAN, KYU-HEE; PARK, BYUNG-LYUL; KIM, BYUNG-HEE; AHN, SANG-HOON; MOON, KWANG-JIN
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 027350/0107 →
Priority Claims (1)
KR 10-2010-0128972 · Dec 16, 2010 · national
Continuity (1)
Related Publication 20120153500A1 · Jun 21, 2012