IP Library Granted Patent US 8,736,347
Granted Patent B2
US 8,736,347 · App. 13/959,254 · Granted May 27, 2014

Adjustable power splitter and corresponding methods and apparatus

Inventors: Abdulrhman M. S. Ahmed (Gilbert, AZ); Mario M. Bokatius (Chandler, AZ); Paul R. Hart (Phoenix, AZ); Joseph Staudinger (Gilbert, AZ); Richard E. Sweeney (Chandler, AZ)
Assignee: Freescale Semiconductor, Inc.
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Quick Facts
Patent No.
US 8,736,347
App. No.
13/959,254
Granted
May 27, 2014
Kind
B2
Abstract

An adjustable power splitter includes: a power divider with an input and a first and second divider output; a first adjustable phase shifter and first adjustable attenuator series coupled to the first divider output and providing a first power output; a second adjustable phase shifter and second adjustable attenuator series coupled to the second divider output and providing a second power output; an interface; and a controller. The controller is configured to receive, via the interface, data indicating phase shifts to be applied by the first and second adjustable phase shifters and attenuation levels to be applied by the first and second adjustable attenuators, and to control, based on the data, the phase shifts and attenuation levels applied by the first and second adjustable phase shifters and the first and second adjustable attenuators.

Claims (84)

1. An adjustable radio frequency power splitter comprising:

a power splitter input;

a first power splitter output coupled to a first amplifier;

a second power splitter output coupled to a second amplifier;

a power divider with a power divider input coupled to the power splitter input, a first divider output, and a second divider output;

a first adjustable phase shifter coupled to the first divider output;

a first adjustable attenuator coupled to the first divider output and series coupled with the first adjustable phase shifter, wherein the first adjustable phase shifter and the first adjustable attenuator are configured to provide a first output signal at the first power splitter output;

a second adjustable phase shifter coupled to the second divider output;

a second adjustable attenuator coupled to the second divider output and series coupled with the second adjustable phase shifter, wherein the second adjustable phase shifter and the second adjustable attenuator are configured to provide a second output signal at the second power splitter output;

an interface; and

a controller configured to receive, via the interface, data indicating phase shifts to be applied by the first and second adjustable phase shifters and attenuation levels to be applied by the first and second adjustable attenuators, and to control, based on the data, the phase shifts and attenuation levels applied by the first and second adjustable phase shifters and the first and second adjustable attenuators.

2. The adjustable radio frequency power splitter of claim 1 , wherein the interface is a serial interface.

3. The adjustable radio frequency power splitter of claim 2 , wherein the interface is a serial peripheral interface.

4. The adjustable radio frequency power splitter of claim 1 , wherein:

the first and second attenuators and the first and second phase shifters each include switches that control the attenuation levels and phase shifts applied by the first and second attenuators and the first and second phase shifters, respectively; and

the controller controls the phase shifts and attenuation levels applied by the first and second adjustable phase shifters and the first and second adjustable attenuators by controlling states of the switches.

5. The adjustable radio frequency power splitter of claim 4 , wherein the controller is provided state information for the switches in the first and second adjustable attenuators and the first and second adjustable phase shifters, and the controller acts as one or more latching buffers with outputs arranged and coupled to ensure that the switches are in an appropriate ON or OFF state.

6. The adjustable radio frequency power splitter of claim 1 , wherein the data includes a multiple-bit value that uniquely specifies one of multiple states for the first and second adjustable phase shifters and attenuation levels to be applied by the first and second adjustable attenuators.

7. The adjustable radio frequency power splitter of claim 1 , wherein the controller determines the states of the first and second adjustable phase shifters and the first and second adjustable attenuators to realize phase shifts and attenuations indicated in the data.

8. The adjustable radio frequency power splitter of claim 1 , further comprising:

a third power splitter output; and

wherein the power divider further comprises a third divider output.

9. An adjustable radio frequency power splitter comprising:

a power splitter input;

a first power splitter output;

a second power splitter output;

a power divider with a power divider input coupled to the power splitter input, a first divider output, and a second divider output;

a first adjustable phase shifter coupled to the first divider output;

a first adjustable attenuator coupled to the first divider output and series coupled with the first adjustable phase shifter, wherein the first adjustable phase shifter and the first adjustable attenuator are configured to provide a first output signal at the first power splitter output;

a second adjustable phase shifter coupled to the second divider output;

a second adjustable attenuator coupled to the second divider output and series coupled with the second adjustable phase shifter, wherein the second adjustable phase shifter and the second adjustable attenuator are configured to provide a second output signal at the second power splitter output;

an interface that includes a data in line, a data out line, a clock signal line, and a chip select line; and

a controller configured to receive, via the interface, data indicating phase shifts to be applied by the first and second adjustable phase shifters and attenuation levels to be applied by the first and second adjustable attenuators, and to control, based on the data, the phase shifts and attenuation levels applied by the first and second adjustable phase shifters and the first and second adjustable attenuators.

10. An adjustable radio frequency power splitter comprising:

a power splitter input;

a first power splitter output;

a second power splitter output;

a power divider with a power divider input coupled to the power splitter input, a first divider output, and a second divider output;

a first adjustable phase shifter coupled to the first divider output;

a first adjustable attenuator coupled to the first divider output and series coupled with the first adjustable phase shifter, wherein the first adjustable phase shifter and the first adjustable attenuator are configured to provide a first output signal at the first power splitter output;

a second adjustable phase shifter coupled to the second divider output;

a second adjustable attenuator coupled to the second divider output and series coupled with the second adjustable phase shifter, wherein the second adjustable phase shifter and the second adjustable attenuator are configured to provide a second output signal at the second power splitter output;

a fixed phase shifter configured for adding a fixed phase shift between first and second signals at the first and second power splitter outputs, respectively;

an interface; and

a controller configured to receive, via the interface, data indicating phase shifts to be applied by the first and second adjustable phase shifters and attenuation levels to be applied by the first and second adjustable attenuators, and to control, based on the data, the phase shifts and attenuation levels applied by the first and second adjustable phase shifters and the first and second adjustable attenuators.

11. The adjustable radio frequency power splitter of claim 10 , wherein the fixed phase shift is a negative forty five degree shift for the first signal at the first power splitter output and a positive forty five degree phase shift for the second signal at the second power splitter output.

12. The adjustable radio frequency power splitter of claim 10 wherein the fixed phase shifter is a lumped element circuit having an inductive reactance and a capacitive reactance.

13. An adjustable power splitter with a Doherty amplifier comprising:

a power input;

a first power output;

a second power output;

a power divider with a power divider input coupled to the power input, a first divider output, and a second divider output;

a first adjustable phase shifter coupled to the first divider output;

a first adjustable attenuator coupled to the first divider output and series coupled with the first adjustable phase shifter, wherein the first adjustable phase shifter and the first adjustable attenuator are configured to provide a first output signal at the first power output;

a second adjustable phase shifter coupled to the second divider output;

a second adjustable attenuator coupled to the second divider output and series coupled with the second adjustable phase shifter, wherein the second adjustable phase shifter and the second adjustable attenuator are configured to provide a second output signal at the second power output;

an interface;

a controller configured to receive, via the interface, data indicating phase shifts to be applied by the first and second adjustable phase shifters and attenuation levels to be applied by the first and second adjustable attenuators, and to control, based on the data, the phase shifts and attenuation levels applied by the first and second adjustable phase shifters and the first and second adjustable attenuators; and

a radio frequency Doherty power amplifier with a main amplifier coupled to the first power output and a first peaking amplifier coupled to the second power output.

14. The adjustable power splitter of claim 13 , wherein:

the first and second attenuators and the first and second phase shifters each include switches that control the attenuation levels and phase shifts applied by the first and second attenuators and the first and second phase shifters, respectively; and

the controller controls the phase shifts and attenuation levels applied by the first and second adjustable phase shifters and the first and second adjustable attenuators by controlling states of the switches.

15. The adjustable power splitter of claim 13 , wherein:

the power divider further includes a third divider output;

the adjustable power splitter further includes a third power output; and

the radio frequency Doherty power amplifier further includes a second peaking amplifier coupled to the third power output.

16. The adjustable power splitter of claim 15 , wherein the main amplifier is biased in a class AB mode, and the first and second peaking amplifiers are biased at different class C operating points.

17. A method of adjusting a power split signal comprising:

splitting an input signal into first and second signals at first and second divider outputs;

receiving, through an interface, data indicating phase shifts to be applied by first and second adjustable phase shifters and attenuations to be applied by first and second adjustable attenuators, wherein the first adjustable phase shifter and the first adjustable attenuator are series coupled between the first divider output and a first power output, and the second adjustable phase shifter and the second adjustable attenuator are series coupled between the second divider output and a second power output;

controlling, based on the data, the states of the first and second adjustable phase shifters and the first and second adjustable attenuators to realize the phase shifts and the attenuations indicated in the data;

adjusting, by the first adjustable phase shifter and the first adjustable attenuator, a phase shift and attenuation of the first signal to provide a first resultant signal at the first power output to a first amplifier; and

adjusting, by the second adjustable phase shifter and the second adjustable attenuator, a phase shift and attenuation of the second signal to provide a second resultant signal at the second power output to a second amplifier.

18. The method of claim 17 , wherein receiving the data comprises receiving the data through a serial interface.

19. The method of claim 18 , wherein receiving the data comprises receiving the data through a serial peripheral interface.

20. The method of claim 17 , wherein:

the first and second attenuators and the first and second phase shifters each include switches that control the attenuations and phase shifts applied by the first and second attenuators and the first and second phase shifters, respectively; and

controlling the phase shifts and attenuations applied by the first and second adjustable phase shifters and the first and second adjustable attenuators comprises controlling states of the switches.

21. The method of claim 17 , wherein the first power output is coupled to the first amplifier, and the second power output is coupled to the second amplifier, and wherein the method further comprises:

monitoring power drawn by one or both of the first and second amplifiers as a function of signal levels; and

adjusting the adjustable attenuators based on the signal levels.

22. The method of claim 17 , wherein the first power output is coupled to the first amplifier, and the second power output is coupled to the second amplifier, and wherein the method further comprises:

monitoring power drawn by one or both of the first and second amplifiers as a function of signal levels; and

adjusting the adjustable phase shifters based on the signal levels.

Assignments (26)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040652 FRAME: 0241. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Jan 5, 2017
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 041260/0850 →
MERGER Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 040652/0241 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PCT NUMBERS IB2013000664, US2013051970, US201305935 PREVIOUSLY RECORDED AT REEL: 037444 FRAME: 0787. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Oct 17, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 040450/0715 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039361/0212 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 038017/0058 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 5, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037444/0787 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0874 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Nov 13, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031627/0201 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Nov 13, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 031627/0158 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
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Continuity (2)
Continuation 13360473 · Jan 27, 2012
Related Publication 20130314143A1 · Nov 28, 2013