IP Library › Granted Patent US 8,737,113
Granted Patent B2
US 8,737,113 · App. 13/387,063 · Granted May 27, 2014

Memory resistor having multi-layer electrodes

Inventors: Jianhua Yang (Palo Alto, CA); Wei Wu (Palo Alto, CA); Gilberto Ribeiro (Menlo Park, CA)
Assignee: Hewlett-Packard Development Company, L.P.
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Quick Facts
Patent No.
US 8,737,113
App. No.
13/387,063
Filed
Jan 25, 2012
Granted
May 27, 2014
Kind
B2
Examiner
LE, VU ANH
Art Unit
2824
USPC
365/148
Abstract

Methods and means related to memory resistors are provided. A memristor includes two multi-layer electrodes and an active material layer. One multi-layer electrode forms an Ohmic contact region with the active material layer. The other multi-layer electrode forms a Schottky barrier layer with the active material layer. The active material layer is subject to oxygen vacancy profile reconfiguration under the influence of an applied electric field. An electrical resistance of the memristor is thus adjustable by way of applied programming voltages and is non-volatile between programming events.

Claims (26)

1. An apparatus including a memristor, the memristor comprising:

a high-conductivity layer;

a diffusion barrier layer;

a first layer and a second layer defining an Ohmic contact layer, the Ohmic contact layer separated from the high-conductivity layer by the diffusion barrier layer; and

an active material layer forming an Ohmic contact region with the Ohmic contact layer, the active material layer including a profile of mobile dopants that is reconfigurable in accordance with programming voltages applied to the memristor.

2. The apparatus according to claim 1 , the memristor characterized by a non-volatile electrical resistance that is adjustable by way of the programming voltages.

3. The apparatus according to claim 1 , the high-conductivity layer including at least copper, aluminum, platinum, palladium, silver, gold, or titanium nitride.

4. The apparatus according to claim 1 , the diffusion barrier layer including at least tungsten nitride, tantalum nitride, or titanium nitride.

5. The apparatus according to claim 1 , the first layer including at least titanium, or chromium.

6. The apparatus according to claim 1 , the second layer including at least platinum, or palladium.

7. The apparatus according to claim 1 , the high-conductivity layer configured to electrically couple the memristor to another entity.

8. The apparatus according to claim 1 , the active material layer including at least titanium dioxide, tantalum oxide, or strontium titanate.

9. The apparatus according to claim 1 , the active material layer configured such that the mobile dopants are defined by oxygen vacancies.

10. The apparatus according to claim 1 , the high-conductivity layer and the diffusion barrier layer and the first layer and the second layer defining a first multi-layer electrode, the memristor further comprising:

a non-reactive metallic layer;

another diffusion barrier layer; and

another high-conductivity layer, the non-reactive metallic layer separated from the other high-conductivity layer by the other diffusion barrier layer, the non-reactive metallic layer and the other diffusion barrier layer and the other high-conductivity layer defining a second multi-layer electrode.

11. The apparatus according to claim 10 , the non-reactive metallic layer in contact with the active material layer so as to define a Schottky barrier.

12. The apparatus according to claim 10 , the non-reactive metallic layer including at least platinum, or another non-reactive metal.

13. The apparatus according to claim 10 , the other diffusion barrier layer including at least tungsten nitride, tantalum nitride, or titanium nitride.

14. The apparatus according to claim 10 , the other high-conductivity layer including at least copper, aluminum, platinum, palladium, silver, gold, or titanium nitride.

15. A method, comprising:

operating a memristor characterized by at least one multi-layer electrode and an active material layer;

applying a programming voltage across the memristor so as to change a non-volatile electrical resistance of the memristor from a first value to a second value distinct from the first value; and

operating the memristor at the second non-volatile electrical resistance value.

16. The method according to claim 15 , the memristor is further characterized by a first mufti-layer electrode and a second multi-layer electrode, the first multi-layer electrode forming an Ohmic contact region with the active material layer and the second multi-layer electrode forming a Schottky barrier with the active material layer.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 9, 2015
From: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
To: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Reel/Frame 037079/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 13, 2012
From: YANG, JIANHUA; WU, WEI; RIBEIRO, GILBERTO
To: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Reel/Frame 027692/0721 →
Continuity (1)
Related Publication 20120120714A1 · May 17, 2012