Display device and electronic equipment
A display device includes a pixel array section, the pixel array section having pixels arranged in a matrix form, at least one of the pixels including an electro-optical element, a write transistor, a holding capacitance, a drive transistor, and a switching transistor. A write scan line is disposed for each pixel row of the pixel array section and adapted to convey a write signal to be applied to the gate electrode of the write transistor. The wiring structure of the write scan line does not intersect with the wiring pattern connected to the gate electrode of the drive transistor.
1. A display device comprising:
a plurality of pixels arranged in a matrix form, at least one of the plurality of pixels including:
an electro-optical element;
a first transistor configured to drive the electro-optical element based on a video signal; and
a second transistor having a current terminal connected to a control terminal of the first transistor by a first wiring;
a scan line extending along a pixel row of the plurality of pixels and configured to convey a signal, wherein
at least one of a signal line and a potential line is disposed along a pixel column of the plurality of pixels,
the scan line and a control terminal of the second transistor is connected via a second wiring having a hooked-shape configuration,
a portion of the hooked-shape configuration intersects the at least one of the signal line and the potential line,
the portion of the hooked-shape configuration, the control terminal of the second transistor, and the scan line are made of a first material, and
the second wiring further includes an interconnection wiring located between the portion of the hooked-shape configuration and the scan line, the interconnection wiring made of a second material, which is different from the first material.
2. The display device according to claim 1 , wherein said at least one of the plurality of pixels further comprises a holding capacitance configured to hold the video signal, said holding capacitance being connected to the current terminal of the second transistor.
3. The display device according to claim 2 , wherein the second transistor is configured to write the video signal into the holding capacitance.
4. The display device according to claim 1 , wherein said at least one of the plurality of pixels further comprises a third transistor in a pixel, wherein a current terminal of the third transistor is connected to the current terminal of the second transistor.
5. The display device according to claim 4 , wherein the scan line does not intersect with the first wiring.
6. The display device according to claim 2 , wherein the holding capacitance is connected to a current terminal of the first transistor.
7. The display device according to claim 1 , wherein another current terminal of the second transistor is connected to the signal line.
8. The display device according to claim 1 , further comprising a light emission control scan line disposed parallel to the scan line, the light emission control scan line being formed not to intersect with the first wiring.
9. The display device according to claim 1 , wherein the hooked-shape configuration has a first segment disposed in parallel to the signal line and a second segment forming a right angle to the first segment and crossing the signal line.
10. The display device according to claim 1 , wherein the signal line is disposed in the pixel column of the pixel array section and the portion of the hooked-shape configuration intersects the signal line.