IP Library › Granted Patent US 8,749,415
Granted Patent B2
US 8,749,415 · App. 13/243,246 · Granted Jun 10, 2014

Analog-to-digital converter and image sensor including the same

Inventors: Wun-Ki Jung (Suwon-si, KR); Jin-Ho Seo (Seoul, KR); Kwi-Sung Yoo (Seoul, KR); Min-Ho Kwon (Seoul, KR); Jae-Hong Kim (Daegu, KR)
Assignee: Samsung Electronics Co., Ltd.
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Quick Facts
Patent No.
US 8,749,415
App. No.
13/243,246
Granted
Jun 10, 2014
Kind
B2
Abstract

An analog-to-digital converter includes a modulation unit and a digital signal generation unit. The modulation unit is disposed corresponding to at least one column line, and sequentially perform delta-sigma modulation on an analog input signal and at least one residue voltage to generate digital bit stream signals. The analog input signal is input through the at least one column line. The at least one residue voltage is generated by performing the delta-sigma modulation on the analog input signal. The digital signal generation unit generates a digital signal corresponding to the analog input signal based on the digital bit stream signals.

Claims (33)

1. An analog-to-digital converter, comprising:

a modulation unit disposed corresponding to at least one column line, the modulation unit configured to sequentially perform delta-sigma modulation on an analog input signal and at least one residue voltage to generate digital bit stream signals, the analog input signal being input through the at least one column line, the at least one residue voltage being generated by performing the delta-sigma modulation on the analog input signal, the modulation unit including

a first modulator disposed corresponding to a first column line, the first modulator configured to perform delta-sigma modulation on a first input signal of the analog input signal to generate a first residue voltage and a first digital bit stream signal, the first input signal being input through the first column line; and

a second modulator configured to perform delta-sigma modulation on the first residue voltage to generate a second digital bit stream signal; and

a digital signal generation unit configured to generate a digital signal corresponding to the analog input signal based on the digital bit stream signals.

2. The analog-to-digital converter as claimed in claim 1 , wherein the second modulator is disposed corresponding to a second column line.

3. The analog-to-digital converter as claimed in claim 2 , wherein the first column line and the second column line are adjacent to each other, and

wherein the first modulator further performs delta-sigma modulation on a second input signal of the analog input signal to generate a second residue voltage and a third digital bit stream signal, and the second modulator further performs delta-sigma modulation on the second residue voltage to generate a fourth digital bit stream signal, the second input signal being input through the second column line.

4. The analog-to-digital converter of as claimed in claim 3 , wherein the first digital bit stream signal corresponds to upper bits of a first digital signal of the digital signal, the second digital bit stream signal corresponds to lower bits of the first digital signal, the third digital bit stream signal corresponds to upper bits of a second digital signal of the digital signal, and the fourth digital bit stream signal corresponds to lower bits of the second digital signal, the first digital signal being generated based on the first input signal, the second digital signal being generated based on the second input signal.

5. The analog-to-digital converter of as claimed in claim 3 , wherein the third digital bit stream signal and the fourth digital bit stream signal are generated after the first digital bit stream signal and the second digital bit stream signal are generated.

6. The analog-to-digital converter of as claimed in claim 3 , further comprising:

a sample-and-hold unit configured to sample and hold the first residue voltage and the second residue voltage.

7. The analog-to-digital converter of as claimed in claim 6 , wherein the sample-and-hold unit provides the first residue voltage to the second modulator while the second modulator performs delta-sigma modulation on the first residue voltage, and the first modulator performs delta-sigma modulation on the second input signal to generate the second residue voltage and the third digital bit stream signal while the second modulator performs delta-sigma modulation on the first residue voltage.

8. The analog-to-digital converter of as claimed in claim 2 , wherein the first modulator holds the first residue voltage to provide the first residue voltage to the second modulator while the second modulator performs delta-sigma modulation on the first residue voltage.

9. The analog-to-digital converter as claimed in claim 2 , wherein the second modulator further generates a second residue voltage by performing delta-sigma modulation on the first residue voltage, and the first modulator further performs delta-sigma modulation on the second residue voltage to generate a third digital bit stream signal.

10. The analog-to-digital converter as claimed in claim 1 , wherein the modulation unit includes:

a third modulator disposed corresponding to a third column line, the third modulator configured to perform delta-sigma modulation on the second residue voltage to generate a third digital bit stream signal, the second modulator being disposed corresponding to a second column line.

11. The analog-to-digital converter as claimed in claim 10 , wherein the first modulator holds the first residue voltage to provide the first residue voltage to the second modulator while the second modulator performs the delta-sigma modulation on the first residue voltage, and the second modulator holds the second residue voltage to provide the second residue voltage to the third modulator while the third modulator performs the delta-sigma modulation on the second residue voltage.

12. The analog-to-digital converter as claimed in claim 11 , wherein the first modulator performs the delta-sigma modulation on a second input signal of the analog input signal to generate a third residue voltage and a fourth digital bit stream signal while the third modulator performs the delta-sigma modulation on the second residue voltage, the second input signal being input through the second column line.

13. The analog-to-digital converter as claimed in claim 1 , wherein the

second modulator is disposed corresponding to the first column line.

14. An analog-to-digital converter comprising:

a modulation unit disposed corresponding to at least one column line, the modulation unit configured to sequentially perform delta-sigma modulation on an analog input signal and at least one residue voltage to generate digital bit stream signals, the analog input signal being input through the at least one column line, the at least one residue voltage being generated by performing the delta-sigma modulation on the analog input signal, wherein the modulation unit includes:

a modulator disposed corresponding to a first column line, the modulator configured to perform delta-sigma modulation on a first input signal of the analog input signal to generate a first residue voltage and a first digital bit stream signal, and configured to perform delta-sigma modulation on the first residue voltage to generate a second digital bit stream signal, the first input signal being input through the first column line, and

a sample-and-hold unit configured to sample and hold the first residue voltage; and

a digital signal generation unit configured to generate a digital signal corresponding to the analog input signal based on the digital bit stream signals.

15. An image sensor, comprising:

a pixel array including a plurality of unit pixels, each unit pixel configured to convert an incident light into an analog pixel signal; and

an analog-to-digital conversion circuit including at least one analog-to-digital converter converting the analog pixel signal into a digital signal, the analog-to-digital converter comprising:

a modulation unit disposed corresponding to at least one column line of the pixel array, the modulation unit configured to sequentially perform delta-sigma modulation on the analog pixel signal and at least one residue voltage to generate digital bit stream signals, the analog pixel signal being output from the pixel array through the at least one column line, the at least one residue voltage being generated by performing delta-sigma modulation on the analog pixel signal, the modulation unit including

a first modulator disposed corresponding to a first column line, the first modulator configured to perform delta-sigma modulation on a first input signal of the analog input signal to generate a first residue voltage and a first digital bit stream signal, the first input signal being input through the first column line; and

a second modulator configured to perform delta-sigma modulation on the first residue voltage to generate a second digital bit stream signal; and

a digital signal generation unit configured to generate the digital signal based on the digital bit stream signals.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 23, 2011
From: JUNG, WUN-KI; SEO, JIN-HO; YOO, KWI-SUNG; KWON, MIN-HO; KIM, JAE-HONG
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 026961/0632 →
Priority Claims (1)
KR 10-2010-0103212 · Oct 22, 2010 · national
Continuity (1)
Related Publication 20120097839A1 · Apr 26, 2012