Semiconductor apparatus
A semiconductor apparatus in a preferred embodiment includes: a substrate; a first chip provided on the substrate; a solder bump formed on the first chip; a solder dam arranged in substantially a rectangular and annular manner outside around the solder bump on the first chip by alternately connecting four sides and four quarter or less arcs; an electrode pad placed outside of the solder dam in the first chip; a second chip provided on the first chip in electric connection to the first chip via the solder bump; and an under-fill material filling a clearance between the first chip and the second chip inside of the solder dam. Here, a difference between an inner diameter and an outer diameter of the arc is 60 μm or more whereas the center radius of the arc is greater than 207.5 μm.
1. A semiconductor apparatus comprising:
a semiconductor substrate;
a first semiconductor chip provided on the semiconductor substrate;
a solder bump formed on the first semiconductor chip;
a solder dam arranged in substantially a rectangular and annular manner outside around the solder bump on the first semiconductor chip by alternately connecting four sides and four quarter or less arcs;
an electrode pad placed outside of the solder dam in the first semiconductor chip;
a second semiconductor chip provided on the first semiconductor chip in electric connection to the first semiconductor chip via the solder bump; and
an under-fill material filling a clearance between the first semiconductor chip and the second semiconductor chip inside of the solder dam,
wherein:
a difference between an inner diameter and an outer diameter of each the arcs is 60 μm, and a center radius of each the arcs is 307.5 μm; and
the solder bump and the solder dam are made of SnCu or SnAg.
2. The semiconductor apparatus according to claim 1 , wherein a height from bottom to top of the solder dam is 20±3 μm.
3. The semiconductor apparatus according to claim 1 , further comprising:
a second solder dam arranged in substantially a rectangular and annular manner outside around the solder dam on the first semiconductor chip by alternately connecting four sides and four quarter or less arcs, wherein:
a difference between an inner diameter and an outer diameter of each of the arcs of the second solder dam is 60 μm or more, and
a center radius of each of the arcs of the second solder dam is greater than 207.5 μm.
4. The semiconductor apparatus according to claim 1 , wherein
one of the first semiconductor chip and the second semiconductor chip is a memory chip whereas the other of the first semiconductor chip and the second semiconductor chip is a logic chip.
5. The semiconductor apparatus according to claim 1 , wherein
the solder dam is formed on an under barrier metal formed on the first semiconductor chip.
6. The semiconductor apparatus according to claim 5 , wherein
the solder bump is formed on the under barrier metal.
7. The semiconductor apparatus according to claim 5 , wherein
the under barrier metal includes Ti and Cu.
8. The semiconductor apparatus according to claim 5 , wherein
the solder dam is formed on Ni plated on the under barrier metal.
9. A semiconductor apparatus comprising:
a semiconductor substrate;
a first semiconductor chip provided on the semiconductor substrate;
a solder bump formed on the first semiconductor chip;
a solder dam arranged in substantially a rectangular and annular manner outside around the solder bump on the first semiconductor chip by alternately connecting four sides and four quarter or less arcs;
an electrode pad placed outside of the solder dam in the first semiconductor chip;
a second semiconductor chip provided on the first semiconductor chip in electric connection to the first semiconductor chip via the solder bump; and
an under-fill material filling a clearance between the first semiconductor chip and the second semiconductor chip inside of the solder dam,
wherein:
a difference between an inner diameter and an outer diameter of each the arcs is 75 μm, and a center radius of each the arcs is 300 μm; and
the solder bump and the solder dam are made of SnCu or SnAq.
10. The semiconductor apparatus according to claim 9 , wherein a height from bottom to top of the solder dam is 20±3 μm.
11. The semiconductor apparatus according to claim 9 , further comprising
a second solder dam arranged in substantially a rectangular and annular manner outside around the solder dam on the first semiconductor chip by alternately connecting four sides and four quarter or less arcs, wherein
a difference between an inner diameter and an outer diameter of each of the arcs of the second solder dam is 60 μm or more, and
a center radius of each of the arcs of the second solder dam is greater than 207.5 μm.
12. The semiconductor apparatus according to claim 9 , wherein
one of the first semiconductor chip and the second semiconductor chip is a memory chip whereas the other of the first semiconductor chip and the second semiconductor chip is a logic chip.
13. The semiconductor apparatus according to claim 9 , wherein
the solder dam is formed on an under barrier metal formed on the first semiconductor chip.
14. The semiconductor apparatus according to claim 13 , wherein
the solder bump is formed on the under barrier metal.
15. The semiconductor apparatus according to claim 13 , wherein
the under barrier metal includes Ti and Cu.
16. The semiconductor apparatus according to claim 13 , wherein
the solder dam is formed on Ni plated on the under barrier metal.