Charge pulse detecting circuit
View Patent ↗The current invention relates, inter alia, to charge pulse amplitude and time detecting circuits, offering very low amplitude and temporal noise, and overcoming noise performance limits in charge pulse detection circuits according to prior art. Embodiments of the present invention may include a sensing device delivering charge pulses onto a sense node, an active buffer buffering the voltage on the sense node with a low impedance, a recharge device removing signal charge from the sense node, a noise filter connected to the output of the active buffer transmitting signal voltage pulses while attenuating noise from the recharge device. Additional and alternative embodiments are specified and claimed.
1. A charge pulse detecting circuit comprising:
a) a sensing device;
b) a sense node;
c) an active buffer having an input and an output;
d) a recharge device comprising at least one first and second terminals; and
e) a noise filter having an input and an output node;
the sensing device being operatively coupled with the sense node to deliver charge pulses to the sense node;
the input of the active buffer being connected to the sense node;
the at least one terminal of the recharge device connected to the sense node to enable establishing a stable DC potential on the sense node; and
the noise filter input being connected to the active buffer output, such that, during the transmission of voltage signals responsive to the charge pulses at the sensing device, the RMS input charge variation at the output node contributed by the recharge resistor is reduced to an equivalent of less than 50 charge carriers.
2. The charge pulse detecting circuit according to claim 1 , where the active buffer is a unity gain buffer and wherein the at least one second terminal is connected to a fixed DC potential.
3. The charge pulse detecting circuit according to claim 1 , wherein the active buffer is an inverting amplifier and wherein the at least one second terminal of the recharge device is connected to the output of the inverting amplifier.
4. The charge pulse detecting circuit according to claim 1 , wherein the recharge device is a high but finite DC impedance path establishing a stable DC potential on the sense node while substantially confining the noise power of the recharge device in a low frequency range wherein noise is attenuated by the noise filter resulting in an attenuation of the noise of the recharge device by at least a factor of two.
5. The charge pulse detecting circuit according to claim 1 , wherein the recharge device is a switch which is open for pulse detection and which is closed in regular or irregular time intervals in order to reset the sense node.
6. The charge pulse detecting circuit according to claim 1 , wherein the noise filter is a continuous time high-pass filter with its transition frequency being higher than the bandwidth of the noise generated by the the recharge device but low enough to transmit the signal voltage pulses created as a function of the input charge pulses.
7. The charge pulse detecting circuit according to claim 1 , wherein the noise filter is a continuous time band-pass filter with a lower band limit above the bandwidth of the noise generated by the recharge device but low enough to transmit the signal voltage pulses and with an upper band limit high enough to transmit the signal voltage pulses created as a function of the input charge pulses.
8. The charge pulse detecting circuit according to claim 1 , wherein the noise filter applies voltage amplification to the transmitted signal voltage pulses.
9. The charge pulse detecting circuit according to claim 1 , furthermore comprising at least one comparator that transforms detected voltage pulses into a binary digital signal and at least one digital counter counting digital pulses of the comparator.
10. The charge pulse detecting circuit according to claim 1 fabricated monolithically using semiconductor processing technology.
11. The charge pulse detecting circuit according to claim 9 , wherein at least one of the following elements is implemented with MOS transistors: the recharge device, elements of the active buffer, elements of the noise filter.
12. The charge pulse detecting circuit according to claim 1 , wherein the sensing device is an opto-electrical detector implemented by either one of the following: homojunction diodes, heterojunction diodes, pinned photodiodes, photogates, and charge coupled devices.
13. The charge pulse detecting circuit according to claim 1 , wherein a physical property sensed by the sensing device comprises photons representing the quanta of electromagnetic radiation to be detected, and wherein each photon is creating a pulse comprising at least one charge carrier.
14. An at least one dimensional array of charge pulse detecting circuits according to claim 1 .
15. The charge pulse detecting circuit according to claim 4 , wherein the noise filter is a continuous time high-pass filter with its transition frequency being higher than the bandwidth of the noise generated by the recharge device but low enough to transmit the signal voltage pulses created as a function of the input charge pulses.
16. The charge pulse detecting circuit according to claim 4 , wherein the noise filter is a continuous time band-pass filter with a lower band limit above the bandwidth of the noise generated by the recharge device but low enough to transmit the signal voltage pulses and with an upper band limit high enough to transmit the signal voltage pulses created as a function of the input charge pulses.
17. The charge pulse detecting circuit according to claim 4 , wherein the noise filter applies voltage amplification to the transmitted signal voltage pulses.
18. The charge pulse detecting circuit according to claim 6 , wherein the noise filter applies voltage amplification to the transmitted signal voltage pulses.
19. The charge pulse detecting circuit according to claim 7 , wherein the noise filter applies voltage amplification to the transmitted signal voltage pulses.
20. The charge pulse detecting circuit according to claim 1 , wherein the recharge device is configured such that a duration of a recharge transition on the sense node is at least twice as long as a charge pulse width.