IP Library Granted Patent US 8,762,320
Granted Patent B2
US 8,762,320 · App. 12/646,176 · Granted Jun 24, 2014

State machine with out-of-order processing functionality and method thereof

Inventors: Michael Allen Latta (Loveland, CO); Christian W. Stassen (Newark, OH); Himansu Desai (San Jose, CA)
Assignee: Drumright Group, LLC.
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Quick Facts
Patent No.
US 8,762,320
App. No.
12/646,176
Granted
Jun 24, 2014
Kind
B2
Abstract

According to one embodiment of the invention, software operating as a state machine may be implemented within a digital device to support out-of-ordering processing of events by the state machine. Upon execution of the software by a processor, the following operations are performed. First, a determination is made if an incoming event is a transition, and if so, if the transition is not a transition associated with the current state of the state machine, but rather, is out-of-order from a predetermined order of transitions supported by the state machine. Upon determining that the transition is out-of-order, a determination is made whether the transition is to a reachable state such as a state prior to the current state of the state machine or to a future state from the current state. If so, the transition is allowed to be undertaken.

Claims (32)

1. A state machine that supports out-of-order processing of events, comprising:

a memory to store information directed to transitions that are supported by the state machine;

logic in communication with the memory, the logic to (i) determine if an incoming event is a transition associated with a current state, (ii) determine if the transition is out-of-order from a predetermined order of transitions supported by the state machine, (iii) determine if the out-of-order transition is to a reachable state that is either a state prior to the current state of the state machine or a future state from the current state of the state machine, (iv) allow the transition to be undertaken if the transition is to the reachable state, and (v) perform a plurality of transitions associated with operations (i)-(iv) concurrently,

wherein upon determining if the out-of-order transition is to the reachable state being a state prior to the current state, the logic alters an executing state of the state machine as the prior state, performs one or more actions for entry into the prior state, performs one or more actions while executing within the prior state, and exits the prior state to revert back to the current state.

2. A non-transitory machine readable medium including software that, when executed by a processor, supports out-of-order processing of events comprising:

performing, by the processor, a plurality of out-of-order processing operations concurrently; and

each operation of the plurality of out-of-order processing operations comprises

determining if an incoming event is a transition associated with a current state;

determining if the transition is out-of-order from a predetermined order of transitions supported by a state machine;

determining if the out-of-order transition is to a reachable state that is either a state prior to the current state of the state machine or a future state from the current state of the state machine; and

allowing the transition to be undertaken if the transition is to the reachable state,

wherein upon determining if the out-of-order transition is to the reachable state being a state prior to the current state, the logic alters an executing state of the state machine as the prior state, performs one or more actions for entry into the prior state, performs one or more actions while executing within the prior state, and exits the prior state to revert back to the current state.

3. The state machine of claim 1 , wherein the logic determines if one or more guard conditions are present being that one or more conditions need to be satisfied before allowing the transition to be undertaken.

4. The state machine of claim 1 , wherein the logic further performs an action upon undertaking the transition.

5. A state machine that supports out-of-order processing of events, comprising:

a memory to store information directed to transitions that are supported by the state machine;

logic in communication with the memory, the logic to (i) determine if an incoming event is a transition associated with a current state, (ii) determine if the transition is out-of-order from a predetermined order of transitions supported by the state machine, (iii) determine if the out-of-order transition is to a reachable state that is either a state prior to the current state of the state machine or a future state from the current state of the state machine, (iv) allow the transition to be undertaken if the transition is to the reachable state, and (v) perform a plurality of transitions associated with operations (i)-(iv) concurrently,

wherein upon determining if the out-of-order transition is to the reachable state being the future state, the logic exits the current state and subsequently alters an executing state and an operational state of the state machine to be the future state, performs one or more actions performed by the state machine for entry into the future state, performs one or more actions within the future state, and remains in the future state.

6. The non-transitory machine readable medium of claim 2 , wherein each operation of the plurality of out-of-order processing operations comprises determining if one or more guard conditions are present being that one or more conditions need to be satisfied before allowing the transition to be undertaken.

7. The non-transitory machine readable medium of claim 2 , wherein each operation of the plurality of out-of-order processing operations comprises performing an action upon undertaking the transition.

8. A non-transitory machine readable medium including software that, when executed by a processor, supports out-of-order processing of events comprising:

performing, by the processor, a plurality of out-of-order processing operations concurrently; and

each operation of the plurality of out-of-order processing operations comprises

determining if an incoming event is a transition associated with a current state;

determining if the transition is out-of-order from a predetermined order of transitions supported by a state machine;

determining if the out-of-order transition is to a reachable state that is either a state prior to the current state of the state machine or a future state from the current state of the state machine, wherein upon determining if the out-of-order transition is to the reachable state being the future state, each operation of the plurality of out-of-order processing operations further comprises exiting the current state and subsequently altering an executing state and an operational state of the state machine to be the future state, performing one or more actions performed by the state machine for entry into the future state, performing one or more actions within the future state, and remaining in the future state;

allowing the transition to be undertaken if the transition is to the reachable state.

9. A state machine that supports out-of-order processing of events, comprising:

a memory to store information directed to transitions that are supported by the state machine;

logic in communication with the memory, the logic supporting both a plurality of current states and transitions from each of the plurality of current states that occur concurrently and independently from each other, the logic to (i) determine if an incoming event is a transition of the transitions that is associated with one of the plurality of current states, the one of the plurality of current states is a current operational state; (ii) determine if the transition is out-of-order from a predetermined order of transitions supported by the state machine; (iii) determine if the out-of-order transition is to a reachable executing state that is either an executing state prior to the current operational state of the state machine or a future executing state from the current operational state of the state machine; (iv) allow the transition to be undertaken if the transition is to the reachable executing state; and (v) performing an action associated with the transition to the reachable executing state,

wherein (i) upon determining if the out-of-order transition is to the reachable executing state, the logic alters an executing state of the state machine as the prior executing state, performs one or more actions for entry into the prior executing state, performs one or more actions while executing within the prior executing state, and exits the prior executing state to revert back to the current operational state, or (ii) upon determining if the out-of-order transition is to the reachable executing state being the future executing state, the logic exits the current operational state and subsequently transitions to a future operational state of the state machine, performs one or more actions performed by the state machine for entry into the future operational state, performs one or more actions within the future operational state, and remains in the future operational state.

10. The state machine of claim 9 , wherein the logic determines if one or more guard conditions are present being that one or more conditions need to be satisfied before allowing the transition to be undertaken.

Assignments (5)
AGREEMENT OF REORGANIZATION Recorded Jan 14, 2021
From: DRUMRIGHT GROUP, LLC
To: COGILITY SOFTWARE CORPORATION
Reel/Frame 055007/0308 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 25, 2013
From: COGILITY SOFTWARE CORPORATION
To: DRUMRIGHT GROUP, LLC.
Reel/Frame 029870/0870 →
RELEASE OF SECURITY INTEREST Recorded Jan 24, 2013
From: AQUIRED SALES CORP.
To: COGILITY SOFTWARE CORPORATION
Reel/Frame 029690/0149 →
SECURITY AGREEMENT Recorded Feb 3, 2011
From: COGILITY SOFTWARE CORPORATION
To: ACQUIRED SALES CORP.
Reel/Frame 025741/0906 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 3, 2011
From: LATTA, MICHAEL ALLEN; STASSEN, CHRISTIAN W.; DESAI, HIMANSU
To: COGILITY SOFTWARE CORPORATION
Reel/Frame 025742/0435 →
Continuity (1)
Related Publication 20110153546A1 · Jun 23, 2011