IP Library Granted Patent US 8,788,781
Granted Patent B2
US 8,788,781 · App. 13/331,749 · Granted Jul 22, 2014

Descriptor scheduler

Inventors: Chi Kong Lee (Fremont, CA); Siu-Hung Fred Au (Fremont, CA); Jungil Park (San Jose, CA); Hyunsuk Shin (San Jose, CA)
Assignee: Marvell World Trade Ltd.
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Quick Facts
Patent No.
US 8,788,781
App. No.
13/331,749
Filed
Dec 20, 2011
Granted
Jul 22, 2014
Kind
B2
Examiner
GU, SHAWN X
Art Unit
2188
USPC
711/168
Abstract

Methods, systems and computer program products for providing a sequencer that schedules job descriptors are described. The sequencer can manage the scheduling of the job descriptors for execution based on the availability of their respective segments and channels. For example, the sequencer can check the status of the segments, and identify one or more segments that are in busy or full state, or one or more segments that are in non-busy or empty state. Based on the status check, the sequencer can execute job descriptors out of order, and in particular, give priorities to job descriptors whose associated segments are available over job descriptors whose associated segments are in busy or full state.

Claims (51)

1. A device comprising:

a buffer manager comprising hardware and having a plurality of segments each storing data associated with a different job descriptor of a plurality of job descriptors;

a controller comprising hardware and being configured to control a plurality of flash memory devices each operatively coupled to a corresponding channel, the controller configured to control a communication of the data associated with the respective job descriptor to or from the plurality of flash memory devices through the corresponding channel; and

a sequencer comprising hardware and configured to receive the plurality of job descriptors in a first order and schedule a sequential execution of each of the plurality of job descriptors based on an availability of a corresponding segment and channel, wherein the scheduled sequential execution of the plurality job descriptors is in a second order, the second order being different than the first order.

2. The device of claim 1 , wherein the plurality of job descriptors include a first job descriptor specifying a first segment that serves data associated with the first job descriptor and a second job descriptor specifying a second segment that serves data associated with the second job descriptor.

3. The device of claim 2 , wherein the sequencer schedules an execution of the second job descriptor before the first job descriptor if the second segment is available and the first segment is unavailable.

4. The device of claim 2 , wherein the sequencer schedules an execution of the first job descriptor before the second job descriptor if the first segment is available and the second segment is unavailable.

5. The device of claim 2 , wherein:

the plurality of job descriptors include a third job descriptor specifying a third segment that serves data associated with the third job descriptor; and

the sequencer schedules an execution of the third job descriptor before the first job descriptor and the second job descriptor if the first segment and the second segment are unavailable, and the third segment is available.

6. The device of claim 2 , wherein:

the plurality of job descriptors include a third job descriptor specifying a third segment; and

the sequencer schedules an execution of the third descriptor after the first job descriptor but before the second job descriptor if the first segment and the third segment are available, and the second segment is unavailable.

7. The device of claim 1 , wherein the plurality of job descriptors include a first job descriptor specifying a first channel to be used for transmitting data to or receiving data from a first flash memory device and a second job descriptor specifying a

second channel different from the first channel, the second channel to be used for transmitting data to or receiving data from a second flash memory device different from the first flash memory device.

8. The device of claim 7 , wherein the sequencer schedules an execution of the second job descriptor before the first job descriptor if the second channel is available and the first channel is unavailable.

9. A method comprising:

receiving a first command to access a memory, the first command indicating at least one of a first segment that serves data associated with the first command, or a first instruction for retrieving data from or writing data to a first flash memory device through a first channel;

receiving a second command, the second command indicating at least one of a second segment that serves data associated with the second command, or a second instruction for retrieving data from or writing data to a second flash memory device through a second channel;

determining a segment status of the first segment and the second segment, or a channel status of the first channel and the second channel; and

scheduling a processing of the first command and the second command based on the segment status or the channel status such that an order of the scheduled processing for the first and second commands includes processing a later-issued command before an earlier-issued command.

10. The method of claim 9 , wherein:

receiving the first command includes a first job descriptor specifying at least one of the first segment or the first instruction; and

receiving the second command includes a second job descriptor specifying at least one of the second segment or the second instruction.

11. The method of claim 10 , further comprising determining the channel status of the first channel and the second channel,

wherein scheduling the processing of the first command and the second command includes scheduling the processing of the second job descriptor before the first job descriptor if the channel status indicates that the second channel is available and the first channel is unavailable.

12. The method of claim 10 , further comprising determining the channel status of the first channel and the second channel,

wherein scheduling the processing of the first command and the second command includes scheduling the processing of the first job descriptor before the second job descriptor if the channel status indicates that the first channel is available and the second channel is unavailable.

13. The method of claim 10 , further comprising:

receiving a third command that includes a third job descriptor specifying a third instruction for retrieving data from or writing data to a third flash memory device through a third channel.

14. The method of claim 13 , further comprising determining a channel status of the first channel, the second channel, and the third channel,

wherein scheduling processing of the first job descriptor, the second job descriptor, and the third job descriptor includes scheduling the processing of the third job descriptor before the first job descriptor and the second job descriptor if the first channel and the second channel are unavailable, and the third channel is available.

15. The method of claim 13 , further comprising determining a channel status of the first channel, the second channel, and the third channel,

wherein scheduling processing of the first job descriptor, the second job descriptor, and the third job descriptor includes scheduling the processing of the third descriptor after the first job descriptor but before the second job descriptor if channel status indicates that the first channel and the third channel are available, and the second channel is unavailable.

16. The method of claim 10 , further comprising determining the segment status of the first segment and the second segment,

wherein scheduling the processing of the first command and the second command includes scheduling the processing of the second job descriptor before the first job descriptor if the second segment is available and the first segment is unavailable.

17. The method of claim 10 , further comprising determining the segment status of the first segment and the second segment,

wherein scheduling the processing of the first command and the second command includes scheduling the processing of the first job descriptor before the second job descriptor if the first segment is available and the second segment is unavailable.

18. The method of claim 10 , further comprising receiving a third command that includes a third job descriptor specifying a third segment that serves data associated with the third job descriptor,

wherein:

determining the segment status includes determining segment status of the first segment, the second segment, and the third segment; and

scheduling the processing of the first command and the second command includes scheduling processing of the third job descriptor before the first job descriptor and the second job descriptor if the first segment and the second segment are unavailable, and the third segment is available.

19. The method of claim 10 , further comprising receiving a third command that includes a third job descriptor specifying a third segment that serves data associated with the third job descriptor,

wherein:

determining the segment status includes determining segment status of the first segment, the second segment, and the third segment; and

scheduling the processing of the first command and the second command includes scheduling processing of the third descriptor after the first job descriptor but before the second job descriptor if the first segment and the third segment are available, and the second segment is unavailable.

20. A system comprising:

a host that issues a plurality of job descriptors each specifying at least one of a target segment or target channel;

a buffer manager that controls a plurality of segments including the target segment, each segment associated with a different job descriptor for temporarily storing data associated with the different job descriptor, the data including data to be written to a flash memory device or data read from the flash memory device;

a plurality of flash memory devices each operatively coupled to a different channel for communicating each data associated with a different job descriptor between the host and the respective flash memory device; and

a sequencer that schedules an execution of a job descriptor with respect to other job descriptors based on an availability of the target segment or the target channel such that an order of the scheduled execution includes executing a later-issued job descriptor before an earlier-issued job descriptor.

Assignments (7)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 16, 2020
From: CAVIUM INTERNATIONAL
To: MARVELL ASIA PTE, LTD.
Reel/Frame 053475/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 20, 2020
From: MARVELL INTERNATIONAL LTD.
To: CAVIUM INTERNATIONAL
Reel/Frame 052918/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 29, 2020
From: MARVELL WORLD TRADE LTD.
To: MARVELL INTERNATIONAL LTD.
Reel/Frame 051778/0537 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 22, 2011
From: LEE, CHI-KONG; AU, SIU-HUNG FRED; PARK, JUNGIL; SHIN, HYUNSUK
To: MARVELL SEMICONDUCTOR, INC.
Reel/Frame 027435/0337 →
LICENSE Recorded Dec 22, 2011
From: MARVELL WORLD TRADE LTD.
To: MARVELL INTERNATIONAL LTD.
Reel/Frame 027435/0408 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 22, 2011
From: MARVELL SEMICONDUCTOR, INC.
To: MARVELL INTERNATIONAL LTD.
Reel/Frame 027435/0359 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 22, 2011
From: MARVELL INTERNATIONAL, LTD.
To: MARVELL WORLD TRADE LTD.
Reel/Frame 027435/0386 →
Continuity (2)
Provisional Application 61425098 · Dec 20, 2010
Related Publication 20120159052A1 · Jun 21, 2012