Method of forming semiconductor device having self-aligned plug
A conductive pattern on a substrate is formed. An insulating layer having an opening exposing the conductive pattern is formed. A bottom electrode is formed on the conductive pattern and a first sidewall of the opening. A spacer is formed on the bottom electrode and a second sidewall of the opening. The spacer and the bottom electrode are formed to be lower than a top surface of the insulating layer. A data storage plug is formed on the bottom electrode and the spacer. The data storage plug has a first sidewall aligned with a sidewall of the bottom electrode and a second sidewall aligned with a sidewall of the spacer. A bit line is formed on the data storage plug.
1. A method of fabricating a semiconductor device, comprising:
forming a conductive pattern on a substrate;
forming a first insulating pattern having a first trench on the conductive pattern;
forming a first spacer on a sidewall of the first trench;
forming a second trench exposing the conductive pattern below the first trench using the first spacer as an etch mask;
forming a bottom electrode on sidewalls of the first spacer and the second trench;
forming a second insulating pattern filling the first trench and the second trench;
recessing the first spacer, recessing the bottom electrode, and forming an opening between the first insulating pattern and the second insulating pattern; and
forming a data storage plug filling the opening.
2. The method of claim 1 , wherein forming the first insulating pattern comprises:
forming a first molding layer on the substrate having the conductive pattern;
forming a second molding layer on the first molding layer;
patterning the second molding layer; and
forming the first trench.
3. The method of claim 2 , wherein the first molding layer and the second molding layer are formed of different material layers, the first molding layer being exposed on a bottom of the first trench.
4. The method of claim 2 , wherein the first spacer has a bottom in contact with the first molding layer.
5. A method of fabricating a semiconductor device, comprising:
forming an insulating layer on a substrate having an opening therein;
forming a bottom electrode and a spacer on opposing sidewalls of the insulating layer;
forming a data storage plug having first and second sidewalls aligned with sidewalls of the bottom electrode and spacer, respectively.
6. The method of claim 5 , wherein the bottom electrode has an L-shaped cross-section.
7. The method of claim 6 , wherein a portion of the bottom electrode is disposed between the spacer and the substrate.
8. The method of claim 5 , further comprising:
forming a conductive pattern on the substrate, the insulating layer being formed on the conductive pattern such that the opening exposes the conductive pattern.
9. The method of claim 8 , wherein the bottom electrode entirely covers a top surface of the conductive pattern.