Low-cost solar cells and methods for fabricating low cost substrates for solar cells
Substrates for solar cells are prepared by etching a plurality of metallurgical grade wafers; depositing aluminum layer on backside of each wafer; depositing a layer of hydrogenated silicon nitride on front surface of each wafer; annealing the wafers at elevated temperature; removing the hydrogenated silicon nitride without disturbing the aluminum layer. A solar cell is then fabricated on the front surface of the wafer while the aluminum remain to serve as the back contact of the cell.
1. A method for preparing substrates using metallurgical grade silicon, comprising:
obtaining wafer consisting of metal grade silicon;
performing conditioning etch on the wafer;
depositing a sacrificial layer on front surface of the wafer;
depositing metallization layer on backside of the wafer;
annealing the wafer at elevated temperature; and,
removing the sacrificial layer without disturbing the metallization layer.
2. The method of claim 1 , wherein performing conditioning etch comprises removing 15-30 microns from each side of the wafer.
3. The method of claim 2 , wherein performing conditioning etch comprises etching the wafer in a solution of HNA or KOH.
4. The method of claim 3 , wherein performing conditioning etch further comprises performing organic material removal etch and metal removal etch.
5. The method of claim 3 , wherein performing conditioning etch further comprises etching in a solution of sulfuric acid and peroxide, etching in a solution of HF and HCl, and etching in a solution of diluted HF.
6. The method of claim 1 wherein depositing a sacrificial layer comprises depositing a hydrogenated layer of silicon nitride over the front surface of the wafer.
7. The method of claim 6 , wherein depositing a sacrificial layer further comprises depositing a layer of n-type amorphous silicon directly on the front surface of the wafer prior to depositing the silicon nitride layer, and wherein the silicon nitride layer is deposited directly on the n-type amorphous silicon layer.
8. The method of claim 5 , wherein depositing a sacrificial layer further comprises depositing a layer of n-type amorphous silicon directly on the front surface of the wafer prior to depositing the silicon nitride layer, and wherein the silicon nitride layer is deposited directly on the n-type amorphous silicon layer.
9. The method of claim 7 , wherein the wafer is doped p-type and depositing metallization layer on backside comprises depositing a layer of p-type amorphous silicon directly on the backside of the wafer, depositing a titanium layer on the p-type amorphous silicon, and depositing a layer of aluminum on the titanium layer.
10. The method of claim 8 , wherein removing the sacrificial layer comprises plasma dry etching the front surface so as to entirely remove the sacrificial layer.
11. The method of claim 10 , wherein plasma dry etching comprises using a remote plasma source to perform the etching.
12. The method of claim 11 , wherein the wafer is doped p-type and further comprising depositing an n-type amorphous silicon layer over the front surface of the wafer.
13. The method of claim 12 , further comprising depositing an intrinsic amorphous silicon layer directly on the front surface of the wafer before depositing the n-type amorphous silicon layer, and depositing the n-type amorphous silicon layer directly on the intrinsic amorphous silicon layer.
14. The method of claim 13 , further comprising depositing an ITO directly on the n-type amorphous silicon layer.
15. The method of claim 14 , further comprising forming contact grid directly on the ITO.
16. A method for preparing substrates for solar cells using metallurgical grade silicon, comprising:
obtaining wafer consisting of metal grade silicon;
performing saw damage removal etch on the wafer;
performing cleaning etch on the wafer;
depositing a hydrogenated sacrificial layer on front surface of the wafer;
depositing metallization layer on backside of the wafer at first elevated temperature;
annealing the wafer at a second elevated temperature higher than the first elevated temperature; and,
removing the hydrogenated sacrificial layer without disturbing the metallization layer.
17. The method of claim 16 , wherein the first elevated temperature is selected from 200° C.-400° C. and the second elevated temperature is selected from 400° C.-700° C.
18. The method of claim 17 , wherein depositing a hydrogenated sacrificial layer comprises depositing hydrogenated silicon nitride layer at a temperature selected from 200° C.-400° C.
19. The method of claim 16 , wherein the wafer is doped p-type and depositing metallization layer on backside comprises depositing a layer of p-type amorphous silicon directly on the backside of the wafer, depositing a titanium layer on the p-type amorphous silicon, and depositing a layer of aluminum at the first elevated temperature on the titanium layer.
20. The method of claim 19 , wherein the p-type amorphous silicon is deposited at temperature below about 350° C.