Thin-film transistor substrate and method of manufacturing the same
A thin-film transistor (TFT) substrate includes a semiconductor pattern, a conductive pattern, a first wiring pattern, an insulation pattern and a second wiring pattern. The semiconductor pattern is formed on a substrate. The conductive pattern is formed as a layer identical to the semiconductor pattern on the substrate. The first wiring pattern is formed on the semiconductor pattern. The first wiring pattern includes a source electrode and a drain electrode spaced apart from the source electrode. The insulation pattern is formed on the substrate having the first wiring pattern to cover the first wiring pattern. The second wiring pattern is formed on the insulation pattern. The second wiring pattern includes a gate electrode formed on the source and drain electrodes. Therefore, a TFT substrate is manufactured using two or three masks, so that manufacturing costs may be decreased.
1. A thin-film transistor (TFT) substrate comprising:
a semiconductor pattern formed on a substrate;
a conductive pattern integrally formed with the semiconductor pattern on the substrate;
a first wiring pattern formed on the semiconductor pattern, the first wiring pattern comprising a source electrode and a drain electrode spaced apart from the source electrode;
an insulation pattern formed on the substrate having the first wiring pattern to cover the first wiring pattern; and
a second wiring pattern formed on the insulation pattern, the second wiring pattern comprising a gate electrode formed on the source and drain electrodes.
2. The TFT substrate of claim 1 , wherein the semiconductor pattern includes a metal oxide semiconductor.
3. The TFT substrate of claim 2 , wherein the metal oxide semiconductor includes zinc oxide (ZnO).
4. The TFT substrate of claim 3 , wherein the metal oxide semiconductor includes at least one of indium (In) and gallium (Ga).
5. The TFT substrate of claim 2 , wherein the conductive pattern includes a conductive oxide material formed through a plasma process of the metal oxide semiconductor.
6. The TFT substrate of claim 1 , wherein the first wiring pattern further comprises a data line electrically connected to the source electrode.
7. The TFT substrate of claim 6 , wherein the conductive pattern comprises: a pixel electrode electrically connected to the drain electrode; and a data pad electrically connected to the data line.
8. The TFT substrate of claim 1 , wherein the second wiring pattern further comprises:
a gate line electrically connected to the gate electrode; and
a gate pad electrically connected to the gate line.
9. The TFT substrate of claim 1 , wherein the first wiring pattern further comprises a first maintaining electrode for forming a maintaining capacitor, and
the second wiring pattern further comprises a second maintaining electrode overlapping the first maintaining electrode to form a maintaining capacitor.
10. The TFT substrate of claim 1 , further comprising:
a color filter layer formed on a substrate having the second wiring pattern; and
a black matrix formed on the substrate having the second wiring pattern.