IP Library › Granted Patent US 8,796,682
Granted Patent B2
US 8,796,682 · App. 13/666,153 · Granted Aug 5, 2014

Method for manufacturing a semiconductor device

Inventors: Shinya Sasagawa (Chigasaki, JP); Motomu Kurata (Isehara, JP); Hideaki Kuwabara (Isehara, JP); Mari Terashima (Ayase, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
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Quick Facts
Patent No.
US 8,796,682
App. No.
13/666,153
Granted
Aug 5, 2014
Kind
B2
Abstract

To provide a highly reliable semiconductor device including a transistor using an oxide semiconductor. After a source electrode layer and a drain electrode layer are formed, an island-like oxide semiconductor layer is formed in a gap between these electrode layers so that a side surface of the oxide semiconductor layer is covered with a wiring, whereby light is prevented from entering the oxide semiconductor layer through the side surface. Further, a gate electrode layer is formed over the oxide semiconductor layer with a gate insulating layer interposed therebetween and impurities are introduced with the gate electrode layer used as a mask. Then, a conductive layer is provided on a side surface of the gate electrode layer in the channel length direction, whereby an Lov region is formed while maintaining a scaled-down channel length and entry of light from above into the oxide semiconductor layer is prevented.

Claims (40)

1. A method for manufacturing a semiconductor device, comprising the steps of:

forming a source electrode layer and a drain electrode layer over an insulating surface;

forming an oxide semiconductor layer in a gap between the source electrode layer and the drain electrode layer by a coating method;

forming a gate insulating layer in contact with a top surface of the source electrode layer, the drain electrode layer, and the oxide semiconductor layer;

forming a gate electrode layer in a region overlapping with the oxide semiconductor layer with the gate insulating layer interposed therebetween;

introducing an impurity element into the oxide semiconductor layer with the gate electrode layer used as a mask, thereby forming in the oxide semiconductor layer a pair of impurity regions and a channel region sandwiched between the pair of impurity regions;

forming a conductive film covering the gate electrode layer;

forming an insulating layer over the conductive film;

processing the insulating layer, thereby forming a first sidewall insulating layer and a second sidewall insulating layer provided on a side surface of the gate electrode layer in a channel length direction with the conductive film interposed therebetween; and

etching the conductive film with the first sidewall insulating layer and the second sidewall insulating layer used as a mask, thereby forming a first conductive layer and a second conductive layer in contact with the side surface of the gate electrode layer in the channel length direction.

2. The method for manufacturing a semiconductor device, according to claim 1 , further comprising the steps of:

forming an interlayer insulating layer covering the first sidewall insulating layer, the second sidewall insulating layer, and the gate electrode layer;

forming an opening in the interlayer insulating layer and the gate insulating layer so as to reach the source electrode layer or the drain electrode layer; and

forming a wiring layer in the opening.

3. The method for manufacturing a semiconductor device, according to claim 1 , further comprising the steps of:

forming an interlayer insulating layer covering the first sidewall insulating layer, the second sidewall insulating layer, and the gate electrode layer;

forming an opening in the interlayer insulating layer and the gate insulating layer so as to reach the source electrode layer or the drain electrode layer; and

forming a wiring layer in the opening,

wherein a layer including an aluminum oxide film is formed as the interlayer insulating layer.

4. The method for manufacturing a semiconductor device, according to claim 1 , wherein the oxide semiconductor layer comprises a material selected from indium, gallium, and zinc.

5. A method for manufacturing a semiconductor device, comprising the steps of:

forming a source electrode layer and a drain electrode layer over an insulating surface;

forming an oxide semiconductor layer in a gap between the source electrode layer and the drain electrode layer by a coating method, and then performing heat treatment on the oxide semiconductor layer;

forming a gate insulating layer in contact with a top surface of the source electrode layer, the drain electrode layer, and the oxide semiconductor layer;

forming a gate electrode layer in a region overlapping with the oxide semiconductor layer with the gate insulating layer interposed therebetween;

introducing an impurity element into the oxide semiconductor layer with the gate electrode layer used as a mask, thereby forming in the oxide semiconductor layer a pair of impurity regions and a channel region sandwiched between the pair of impurity regions;

forming a conductive film covering the gate electrode layer;

forming an insulating layer over the conductive film;

processing the insulating layer, thereby forming a first sidewall insulating layer and a second sidewall insulating layer provided on a side surface of the gate electrode layer in a channel length direction with the conductive film interposed therebetween; and

etching the conductive film with the first sidewall insulating layer and the second sidewall insulating layer used as a mask, thereby forming a first conductive layer and a second conductive layer in contact with the side surface of the gate electrode layer in the channel length direction.

6. The method for manufacturing a semiconductor device, according to claim 5 , further comprising the steps of:

forming an interlayer insulating layer covering the first sidewall insulating layer, the second sidewall insulating layer, and the gate electrode layer;

forming an opening in the interlayer insulating layer and the gate insulating layer so as to reach the source electrode layer or the drain electrode layer; and

forming a wiring layer in the opening.

7. The method for manufacturing a semiconductor device, according to claim 5 , further comprising the steps of:

forming an interlayer insulating layer covering the first sidewall insulating layer, the second sidewall insulating layer, and the gate electrode layer;

forming an opening in the interlayer insulating layer and the gate insulating layer so as to reach the source electrode layer or the drain electrode layer; and

forming a wiring layer in the opening,

wherein a layer including an aluminum oxide film is formed as the interlayer insulating layer.

8. The method for manufacturing a semiconductor device, according to claim 5 , wherein the oxide semiconductor layer comprises a material selected from indium, gallium, and zinc.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 1, 2012
From: SASAGAWA, SHINYA; KURATA, MOTOMU; KUWABARA, HIDEAKI; TERASHIMA, MARI
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 029225/0613 →
Priority Claims (1)
JP 2011-247936 · Nov 11, 2011 · national
Continuity (1)
Related Publication 20130119376A1 · May 16, 2013