Imaging system with an array of image sensors
An integrated circuit may have rows and columns of imaging pixel arrays. Row driver circuitry and column readout circuitry may be shared between the imaging pixel arrays. Control circuit blocks may bypass inactive pixel arrays and may shift signals between different signal paths on the integrated circuit. The control circuit blocks may include synchronizing circuitry for deskewing control signals and buffer circuitry for regenerating weak signals as they are distributed across the integrated circuit. An array of lenses may be associated with the integrated circuit. The spacing between imaging pixel arrays may differ at different parts of the integrated circuit. Images from multiple image sensor pixel arrays may be combined to form a single digital image. Image sensors may be provided with unique lenses, different color responses, different image pixels, different image pixel patterns, and other differences. Reference pixels may be interposed in the gaps between image sensor arrays.
1. An image sensor array integrated circuit, comprising:
a plurality of image sensor pixel arrays each having rows and columns of image sensor pixels; and
row driver circuitry that generates row select signals for the image sensor pixels;
row lines that distribute the row select signals from the row driver circuitry to the image sensor pixels in a plurality of the image sensor pixel arrays; and
configurable control circuitry that shifts the row select signals between different row lines, wherein the image sensor pixel arrays are associated with an array of lenses characterized by a center-to-center lens spacing and wherein at least some of the pixel arrays are characterized by a center-to-center pixel array spacing that is greater than the center-to-center lens spacing.
2. The image sensor array integrated circuit defined in claim 1 wherein the image sensor array has a center region that is surrounded by a peripheral region and wherein the image sensor pixel arrays in the peripheral region have larger center-to-center spacings than the image sensor pixel arrays in the center region.
3. The image sensor array integrated circuit defined in claim 1 wherein the configurable control circuitry comprises bypass circuitry that is configured to selectively bypass a given image sensor pixel array in the image sensor array integrated circuit, wherein the plurality of image sensor pixel arrays includes a two-dimensional array of the image sensor pixel arrays, wherein the configurable control circuitry comprises synchronization circuitry for deskewing the row select signals, wherein the configurable control circuitry comprises buffer circuitry, wherein the image sensor pixel arrays comprise columns of data lines that convey digital image data signals to readout circuitry and wherein the configurable control circuitry comprises control circuit blocks that shift the digital image data signals to selected sets of the data lines so that some of the data lines are unused.
4. The image sensor array integrated circuit defined in claim 3 wherein the image sensor array has a center region that is surrounded by a peripheral region and wherein the image sensor pixel arrays in the peripheral region have larger center-to-center spacings than the image sensor pixel arrays in the center region.
5. An image sensor pixel array integrated circuit, comprising:
a plurality of image sensor pixel arrays arranged in rows and columns, each image sensor pixel array having an associated set of data output lines; and
a plurality of control blocks that are configured to shift signals on the data output lines so that an image sensor pixel array in one row supplies output data on a different subset of the data output lines than the image sensor pixel array in another row.
6. The image sensor pixel array integrated circuit defined in claim 5 wherein the image sensor pixel arrays are separated from each other by gaps, the image sensor pixel array further comprising unilluminated reference pixels formed within the gaps.
7. The image sensor pixel array integrated circuit defined in claim 6 further comprising row driver circuits that are shared among multiple image sensor pixel arrays in a given one of the rows.