Methods of forming a semiconductor device by performing a wet acid etching process while preventing or reducing loss of active area and/or isolation regions

1. A method, comprising:

forming a gate structure of a transistor above a surface of a semiconductor substrate, said gate structure being comprised of at least one layer of metal, a silicon-containing layer of material positioned above said at least one layer of metal and a protective cap layer positioned above said silicon-containing layer of material;

forming a sidewall spacer proximate said gate structure;

after forming said sidewall spacer, forming a sacrificial layer of material above said protective cap layer, above said sidewall spacer and above said substrate;

forming a sacrificial protection layer above said sacrificial layer;

reducing a thickness of said sacrificial protection layer such that, after said reduction, an upper surface of said reduced-thickness sacrificial protection layer is positioned at a level that is below a level of an upper surface of said protective cap layer;

with said reduced-thickness sacrificial protection layer in position, performing a first etching process to remove said sacrificial layer from above said protective cap layer to thereby expose said protective cap layer for further processing;

performing a wet acid etching process that includes diluted HF acid to remove said protective cap layer; and

after removing said protective cap layer, performing at least one process operation to remove at least one of said reduced-thickness sacrificial protection layer or said sacrificial layer from above said surface of said substrate.

2. The method of claim 1 , wherein said sidewall spacer and said protective cap layer are comprised of silicon nitride, said sacrificial layer is comprised of silicon dioxide and said layer of silicon-containing material is a layer of polysilicon.

3. The method of claim 1 , wherein said sacrificial protection layer is comprised of one of CHM701B (commercially available from Cheil Chemical Co., Ltd.), HM8006 or HM8014 (both commercially available from JSR Corporation) or ODL-102 (commercially available from ShinEtsu Chemical, Co., Ltd.).

4. The method of claim 1 , wherein performing said wet acid etching process to remove said protective cap layer comprises performing said wet acid etching process with an etch chemistry that includes a diluted HF acid concentration that falls within the range of 1:500-1:10000.

5. The method of claim 1 , wherein performing said wet acid etching process to remove said protective cap layer comprises performing said wet acid etching process at a temperature that falls within the range of about 20-100° C.

6. The method of claim 1 , wherein performing said at least one process operation to remove at least one of said reduced-thickness sacrificial protection layer or said sacrificial layer from above said surface of said substrate comprises performing at least one of a plasma stripping process and an HF acid stripping process.

7. A method, comprising:

forming a gate structure of a transistor above a surface of a semiconductor substrate, said gate structure being comprised of at least one layer of metal, a silicon-containing layer of material positioned above said at least one layer of metal and a protective cap layer positioned above said silicon-containing layer of material;

forming a sidewall spacer such that it contacts a sidewall of said gate structure;

after forming said sidewall spacer, forming a sacrificial layer of material on an upper surface of said protective cap layer, on said sidewall spacer and on said surface of said substrate;

forming a sacrificial protection layer on said sacrificial layer;

reducing a thickness of said sacrificial protection layer such that, after said reduction, an upper surface of said reduced-thickness sacrificial protection layer is positioned at a level that is below a level of said upper surface of said protective cap layer;

with said reduced-thickness sacrificial protection layer in position, performing a first etching process to remove said sacrificial layer from above said protective cap layer to thereby expose said protective cap layer for further processing;

performing a wet acid etching process to remove said protective cap layer, wherein said wet acid etching process is performed with an etch chemistry that includes a diluted HF acid concentration that falls within the range of 1:500-1:10000; and

after removing said protective cap layer, performing at least one process operation to remove at least one of said reduced-thickness sacrificial protection layer or said sacrificial layer from above said surface of said substrate.

8. The method of claim 7 , wherein said sacrificial protection layer is comprised of one of CHM701B (commercially available from Cheil Chemical Co., Ltd.), HM8006 or HM8014 (both commercially available from JSR Corporation) or ODL-102 (commercially available from ShinEtsu Chemical, Co., Ltd.).

9. The method of claim 7 , wherein performing said wet acid etching process to remove said protective cap layer comprises performing said wet acid etching process at a temperature that falls within the range of about 20-100° C.

10. The method of claim 7 , wherein performing said at least one process operation to remove at least one of said reduced-thickness sacrificial protection layer or said sacrificial layer from above said surface of said substrate comprises performing at least one of a plasma stripping process and an HF acid stripping process.

11. A method, comprising:

forming a gate structure of a transistor above a surface of a semiconducting substrate, said gate structure being comprised of at least one layer of metal, a layer of polysilicon positioned above said at least one layer of metal and a protective cap layer positioned above said layer of polysilicon, said protective cap layer being comprised of silicon nitride;

forming a sidewall spacer such that it contacts a sidewall of said gate structure, said sidewall spacer being comprised of silicon nitride;

after forming said sidewall spacer, forming a sacrificial layer of silicon dioxide on an upper surface of said protective cap layer, on said sidewall spacer and on said surface of said substrate;

forming a sacrificial protection layer on said sacrificial layer;

reducing a thickness of said sacrificial protection layer such that, after said reduction, an upper surface of said reduced-thickness sacrificial protection layer is positioned at a level that is below a level of said upper surface of said protective cap layer;

with said reduced-thickness sacrificial protection layer in position, performing a first etching process to remove said sacrificial layer from above said protective cap layer to thereby expose said protective cap layer for further processing;

performing a wet dilute HF acid etching process at a temperature that falls within the range of about 20-100° C. to remove said protective cap layer, wherein an HF acid concentration falls within the range of 1:500-1:10000; and

after removing said protective cap layer, performing at least one process operation to remove at least one of said reduced-thickness sacrificial protection layer or said sacrificial layer from above said surface of said substrate.

12. The method of claim 11 , wherein said sacrificial protection layer is comprised of one of CHM701B (commercially available from Cheil Chemical Co., Ltd.), HM8006 or HM8014 (both commercially available from JSR Corporation) or ODL-102 (commercially available from ShinEtsu Chemical, Co., Ltd.).

13. The method of claim 11 , wherein performing said at least one process operation to remove at least one of said reduced-thickness sacrificial protection layer or said sacrificial layer from above said surface of said substrate comprises performing at least one of a plasma stripping process and an HF acid stripping process.