Shielded gate MOSFET device with a funnel-shaped trench
A MOSFET device has a funnel-shaped trench etched in a semiconductor substrate. The funnel-shaped trench has flared rim extending from a wider cross section trench mouth at the surface of the semiconductor substrate to a narrower cross section trench body portion which terminates in an epilayer portion of the semiconductor substrate. A gate electrode is disposed in the trench on the flared rim. Source and gate regions of the device abut upper and lower portions of the flared rim, respectively. A drain region of the device, which abuts the narrower cross section trench body portion, is self-aligned with a lower edge of a gate electrode.
1. A metal-oxide-semiconductor field-effect transistor (MOSFET) device, comprising:
a funnel-shaped trench having a flared rim etched in a semiconductor substrate,
the flared rim having an upper edge at a wider cross section trench opening at about a top surface of the semiconductor substrate and having a lower edge at a top opening of a narrower cross section trench body portion that terminates in the semiconductor substrate;
a gate electrode disposed in the funnel-shaped trench on a gate dielectric layer formed on the flared rim, the gate electrode having a split structure with a first gate electrode portion being separated from a second gate electrode portion by an insulator material; and
a source region, a gate region, and a drain region disposed in the semiconductor substrate,
the gate region abutting a lower portion of the flared rim, the drain region abutting a sidewall of the narrower cross section trench body portion with a top of the drain region being aligned with a lower edge of the gate electrode.
2. The MOSFET device of claim 1 , wherein the flared rim has a substantially linear profile in cross-section between the upper edge of the flared rim and the lower edge of the flared rim.
3. The MOSFET device of claim 1 , wherein the flared rim has a curved profile in cross-section between the upper edge of the flared rim and the lower edge of the flared rim.
4. The MOSFET device of claim 1 , wherein the flared rim is flared at an angle of about 45 degrees to a perpendicular to the top surface of the semiconductor substrate.
5. The MOSFET device of claim 1 , wherein the flared rim is flared at an angle of between 20 degrees and 80 degrees to a perpendicular to the top surface of the semiconductor substrate.
6. The MOSFET device of claim 1 , wherein the lower edge of the gate electrode is at about the lower edge of the flared rim.
7. The MOSFET device of claim 1 , wherein the gate electrode includes at least one of a polysilicon material, a cobalt silicide material, and a titanium silicide material.
8. The MOSFET device of claim 1 , wherein the funnel-shaped trench has a depth greater than about 1 μm.
9. The MOSFET device of claim 1 , further comprising a shield gate electrode disposed in the narrower cross section trench body portion, the shield gate electrode being insulated from and disposed below the gate electrode.
10. The MOSFET device of claim 1 , further comprising a self-aligned source-metal contact.
11. The MOSFET device of claim 1 , wherein the semiconductor substrate is a heavily doped n-type conductive substrate with a lightly doped n-type epitaxial over layer, and the funnel-shaped trench terminates within the lightly doped n-type epitaxial over layer.
12. The MOSFET device of claim 1 , wherein the semiconductor substrate is a heavily doped p-type conductive substrate with a lightly doped p-type epitaxial over layer, the funnel-shaped trench terminates within the lightly doped p-type epitaxial over layer.
13. The MOSFET device of claim 1 , wherein the first gate electrode portion is separated from the second gate electrode portion by about a width of the top opening of the narrower cross section trench body portion.
14. The MOSFET device of claim 1 , wherein the gate electrode having an etched opening extending vertically therethrough to the top opening of the narrower cross section trench body portion.
15. The MOSFET device of claim 1 , wherein the semiconductor substrate is made of a silicon-based material.
16. The MOSFET device of claim 14 , wherein the etched opening is filled with the insulator material.
17. The MOSFET device of claim 14 , wherein the semiconductor substrate is made of a silicon-based material.
18. A metal-oxide-semiconductor field-effect transistor (MOSFET) device, comprising:
a funnel-shaped trench disposed in a semiconductor substrate, the funnel-shaped trench having a flared rim and having a trench body disposed below the flared rim, the flared rim having a sidewall with a first slope and the trench body having a sidewall with a second slope different from the first slope;
a gate dielectric layer disposed in the trench on the flared rim;
a gate electrode disposed on the gate dielectric layer;
a source region abutting an upper portion of the flared rim;
a gate region abutting a lower portion of the flared rim; and
a drain region abutting a sidewall of the trench body, the drain region having a top aligned with a lower edge of the gate electrode.
19. The MOSFET device of claim 18 , wherein the first slope is about 45 degrees to a perpendicular to a top surface of the semiconductor substrate.
20. The MOSFET device of claim 18 , wherein the first slope is about between 20 degrees and 80 degrees to a perpendicular to a top surface of the semiconductor substrate.
21. The MOSFET device of claim 18 , wherein the lower edge of the gate electrode is at about a lower edge of the flared rim.
22. The MOSFET device of claim 18 , wherein the gate electrode includes at least one of a polysilicon material, a cobalt silicide material, and a titanium silicide material.
23. The MOSFET device of claim 18 , further comprising a shield gate electrode disposed in the trench body below the flared rim, the shield gate electrode being insulated from the gate electrode.
24. The MOSFET device of claim 18 , wherein the semiconductor substrate is a heavily doped conductive substrate with a lightly doped epitaxial over layer, the funnel-shaped trench terminates within the lightly doped epitaxial over layer.
25. The MOSFET device of claim 18 , wherein the semiconductor substrate is made of a silicon-based material.
26. A metal-oxide-semiconductor field-effect transistor (MOSFET) device, comprising:
a trench in a semiconductor substrate, the trench having a flared rim, the flared rim extending down from a wider cross-section trench opening at about a top surface of the semiconductor substrate to a narrower cross-section trench body portion that terminates in the semiconductor substrate;
a gate electrode disposed in the trench on the flared rim;
a drain region in the semiconductor substrate, the drain region having a top aligned with about a lower edge of the gate electrode disposed in the trench on the flared rim;
a gate region disposed in the semiconductor substrate above the drain region; and
a source region disposed in the semiconductor substrate above the gate region, the source region including a dopant in a portion of the semiconductor substrate above a top edge of the gate electrode.
27. The MOSFET device of claim 26 , wherein the gate electrode includes a polysilicon electrode disposed on a gate dielectric layer disposed on the flared rim.
28. The MOSFET device of claim 26 , further comprising a shield gate electrode disposed in the trench body below the flared rim, the shield gate electrode being insulated from the gate electrode.
29. The MOSFET device of claim 26 , wherein the semiconductor substrate is a heavily doped conductive substrate with a lightly doped epitaxial over layer, and the trench having the flared rim terminates within the lightly doped epitaxial over layer.