Hybrid control techniques for series resonant converter
A DC to DC converter system, includes inverter circuitry having a first and a second switch, the inverter circuitry further configured to generate a first and a second gate control signal, the signals configured to open and close the first and second switch, respectively, and generate an AC signal from a DC input signal. The system further includes transformer circuitry configured to transform the AC signal into a sinusoidal AC signal, second stage circuitry configured to rectify the sinusoidal AC signal to a DC output signal, and hybrid control circuitry configured to modulate the first and second gate control signals, wherein the modulation comprises pulse frequency modulation (PFM) and pulse width modulation (PWM).
1. A DC to DC converter system, comprising:
inverter circuitry having a first and a second switch, said inverter circuitry further configured to generate a first and a second gate control signal configured to open and close said first and said second switch, respectively, and generate an AC signal from a DC input signal;
transformer circuitry configured to transform said AC signal into a sinusoidal AC signal;
second stage circuitry configured to rectify said sinusoidal AC signal to a DC output signal; and
control circuitry configured to modulate said first and said second gate control signals, wherein said modulation comprises pulse frequency modulation (PFM) and pulse width modulation (PWM), the control circuitry configured to switch between the pulse width modulation (PWM) under first load conditions and the pulse frequency modulation (PFM) under second load conditions, the second load conditions being greater than the first load conditions.
2. The DC to DC converter system of claim 1 , wherein said PFM is limited to a preset upper frequency threshold.
3. The DC to DC converter system of claim 2 , wherein said PWM modulates said gate control signals when said PFM reaches said preset upper frequency threshold.
4. The DC to DC converter system of claim 1 , wherein said PFM is configured to operate at an approximately 50 percent duty cycle comprising a dead time such that said closing of said first and said second switches occur at a substantially zero voltage across each of said switches.
5. The DC to DC converter system of claim 1 , wherein said PWM is configured such that said closing of one of said first and said second switches occurs at a substantially zero voltage across said switch.
6. The DC to DC converter system of claim 2 , further comprising voltage controlled oscillator circuitry configured to sequentially charge and discharge a pulse frequency modulated capacitor (PFMcap) such that the voltage (VCT) of said PFMcap oscillates between a high voltage threshold (VTH) and a low voltage threshold (VTL) in a triangular waveform.
7. The DC to DC converter system of claim 6 , wherein said VCT is compared to a clamp voltage to limit said PFM to said preset upper frequency threshold.
8. The DC to DC converter system of claim 6 , further comprising a feedback compensation circuit, wherein said VCT is compared to a comparison voltage (Vcomp) to adjust a duty cycle associated with said PWM, wherein said Vcomp is derived from said feedback compensation circuit to regulate said DC output signal.
9. A method for DC to DC conversion, comprising:
inverting a DC input signal to an AC signal by generating a first and a second gate control signal to open and close a first and a second switch, respectively;
transforming said AC signal into a sinusoidal AC signal;
rectifying said sinusoidal AC signal to a DC output signal; and
modulating said first and said second gate control signals, wherein said modulation comprises pulse frequency modulation (PFM) and pulse width modulation (PWM), said modulation switching between the pulse width modulation (PWM) under first load conditions and the pulse frequency modulation (PFM) under second load conditions, the second load conditions being greater than the first load conditions.
10. The method of claim 9 , further comprising limiting said PFM to a preset upper frequency threshold.
11. The method of claim 10 , further comprising said PWM modulating said gate control signals when said PFM reaches said preset upper frequency threshold.
12. The method of claim 9 , further comprising operating said PFM at an approximately 50 percent duty cycle comprising a dead time such that said closing of said first and said second switches occur at a substantially zero voltage across each of said switches.
13. The method of claim 9 , further comprising operating said PWM such that said closing of one of said first and said second switches occurs at a substantially zero voltage across said switch.
14. The method of claim 10 , further comprising sequentially charging and discharging a pulse frequency modulated capacitor (PFMcap) such that the voltage (VCT) of said PFMcap oscillates between a high voltage threshold (VTH) and a low voltage threshold (VTL) in a triangular waveform.
15. The method of claim 14 , further comprising comparing said VCT to a clamp voltage to limit said PFM to said preset upper frequency threshold.
16. The method of claim 14 , further comprising comparing said VCT to a comparison voltage (Vcomp) to adjust a duty cycle associated with said PWM, wherein said Vcomp is derived from feedback of said DC output signal to regulate said DC output signal.