IP Library Granted Patent US 8,822,306
Granted Patent B2
US 8,822,306 · App. 13/206,029 · Granted Sep 2, 2014

Method for manufacturing a composite wafer having a graphite core, and composite wafer having a graphite core

Inventors: Rudolf Berger (Regensburg, DE); Hermann Gruber (Woerth a.D., DE); Wolfgang Lehnert (Lintach, DE); Guenther Ruhl (Regensburg, DE); Raimund Foerg (Straubing, DE); Anton Mauder (Kolbermoor, DE); Hans-Joachim Schulze (Taufkirchen, DE); Karsten Kellermann (Altdorf, DE); Michael Sommer (Nuremberg, DE); Christian Rottmair (Erlangen, DE); Roland Rupp (Lauf, DE)
Assignee: Infineon Technologies AG
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Quick Facts
Patent No.
US 8,822,306
App. No.
13/206,029
Granted
Sep 2, 2014
Kind
B2
Abstract

According to an embodiment, a composite wafer includes a carrier substrate having a graphite layer and a monocrystalline semiconductor layer attached to the carrier substrate.

Claims (52)

1. A method for manufacturing a composite wafer, comprising:

providing a carrier wafer comprising a graphite layer;

providing a monocrystalline semiconductor wafer comprising a first side and a second side;

forming a bonding layer on at least one of the first side of the semiconductor wafer and the graphite layer of the carrier wafer, the bonding layer comprising a material selected from the group consisting of a metal, metal carbide and metal silicide;

joining the monocrystalline semiconductor wafer with the graphite layer of the carrier wafer through the bonding layer; and

subjecting the carrier wafer, the monocrystalline semiconductor wafer and the bonding layer to a thermal treatment to form an electrically conductive bond between the carrier wafer and the monocrystalline semiconductor wafer.

2. A method according to claim 1 , wherein the monocrystalline semiconductor wafer comprises a wide-band gap semiconductor material.

3. A method according to claim 2 , wherein the wide band-gap material is selected from the group consisting of SiC, GaN, GaAs, derivatives thereof, and combinations thereof.

4. A method according to claim 1 , wherein the metal comprises a metal capable of forming at least one of metal carbide and metal silicide.

5. A method according to claim 4 , wherein the metal is selected from the group consisting of Mo, Ta, Nb, V, Ti, W, Ni, and Cr.

6. A method according to claim 1 , further comprising:

forming an epitaxial layer on the second side of the monocrystalline semiconductor wafer.

7. A method according to claim 6 , wherein the monocrystalline semiconductor wafer is comprised of a first semiconductor material and the epitaxial layer is comprised of a second semiconductor material different to the first semiconductor material.

8. A method according to claim 7 , further comprising:

adapting a coefficient of thermal expansion of the graphite layer of the carrier wafer to a coefficient of thermal expansion of the epitaxial layer.

9. A method according to claim 1 , further comprising:

adapting a coefficient of thermal expansion of the graphite layer of the carrier wafer to a coefficient of thermal expansion of the monocrystalline semiconductor wafer.

10. A method according to claim 1 , further comprising:

forming a protective structure encapsulating the graphite layer.

11. A method according to claim 10 , wherein forming the protective structure comprises forming a metal layer encapsulating the graphite layer, and subjecting the graphite layer and the metal layer to a thermal treatment to form a metal carbide layer.

12. A method according to claim 10 , wherein the protective structure comprises at least one of glass-like carbon, pyrolytically deposited carbon, metal carbide, metal nitride, ternary metal carbide, ternary metal nitride, silicon carbide and combinations thereof.

13. A method according to claim 1 , wherein providing the carrier wafer comprises:

providing a semiconductor wafer;

forming a recess in the semiconductor wafer;

depositing a moulding composition comprising at least one of carbon powder and pitch in the recess of the semiconductor wafer; and

annealing the deposited moulding composition to form the graphite layer.

14. A method according to claim 1 , wherein providing the carrier wafer comprises:

providing a semiconductor wafer;

forming a recess in the semiconductor wafer; and

bonding a preformed graphite wafer in the recess of the semiconductor wafer using a bonding layer.

15. A method according to claim 1 , wherein the carrier wafer comprising the graphite layer comprises one of a carrier substrate comprising a graphite layer, a carrier substrate comprising a graphite core, and a graphite carrier consisting essentially of graphite.

16. A method according to claim 1 , further comprising:

forming a metal silicide interfacial layer between a metallisation layer and the monocrystalline semiconductor wafer; and

forming a metal carbide interfacial layer between the metallisation layer and the graphite layer of the carrier wafer.

17. A method for manufacturing a composite wafer, comprising:

providing a carrier wafer comprising a graphite layer;

providing a monocrystalline semiconductor wafer comprising a first side and a second side opposite to the first side;

forming at least one structure on or at the first side of the monocrystalline semiconductor wafer, the structure being selected from the group consisting of metallisation layer and doping region; and

bonding the monocrystalline semiconductor wafer at its first side to the graphite layer of the carrier wafer.

18. A method according to claim 17 , wherein the monocrystalline semiconductor wafer comprises a wide-band gap semiconductor material selected from the group consisting of SiC, GaN, GaAs, derivatives thereof, and combinations thereof.

19. A method according to claim 17 , wherein the metallisation layer comprises a metal selected from the group consisting of Mo, Ta, Nb, V, Ti, W, Ni, and Cr.

20. A method according to claim 17 , further comprising:

forming a protective structure encapsulating the graphite layer, the protective structure comprising at least one of glass-like carbon, pyrolytically deposited carbon, metal carbide, metal nitride, ternary metal carbide, ternary metal nitride, silicon carbide and combinations thereof.

21. A method according to claim 17 , further comprising:

implanting dopants into the first side of the monocrystalline semiconductor wafer to form at least one doping region.

22. A method according to claim 17 , further comprising:

reducing the thickness of the monocrystalline semiconductor wafer by removing semiconductor material at the second side of the monocrystalline semiconductor wafer.

23. A method according to claim 17 , further comprising:

implanting gas ions into the first side of the monocrystalline semiconductor wafer to form a delamination layer at a predefined depth in the monocrystalline semiconductor wafer; and

subjecting the monocrystalline semiconductor wafer to split the monocrystalline semiconductor wafer along the delamination layer.

24. A method according to claim 23 , wherein splitting of the monocrystalline semiconductor wafer results in the formation of a monocrystalline semiconductor layer which remains attached to the carrier wafer, the monocrystalline semiconductor layer comprising an exposed side, the method further comprising:

forming an epitaxial semiconductor layer on the exposed side of the monocrystalline semiconductor layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 19, 2011
From: BERGER, RUDOLF; GRUBER, HERMANN; LEHNERT, WOLFGANG; RUHL, GUENTHER; FOERG, RAIMUND; MAUDER, ANTON; SCHULZE, HANS-JOACHIM; KELLERMANN, KARSTEN; SOMMER, MICHAEL; ROTTMAIR, CHRISTIAN; RUPP, ROLAND
To: INFINEON TECHNOLOGIES AG
Reel/Frame 026928/0447 →
Continuity (2)
Continuation In Part 12894344 · Sep 30, 2010
Related Publication 20120083098A1 · Apr 5, 2012