IP Library Granted Patent US 8,823,092
Granted Patent B2
US 8,823,092 · App. 13/297,480 · Granted Sep 2, 2014

Semiconductor device and manufacturing method thereof

Inventor: Shunpei Yamazaki (Setagaya, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
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Quick Facts
Patent No.
US 8,823,092
App. No.
13/297,480
Granted
Sep 2, 2014
Kind
B2
Abstract

An object is to provide a transistor in which the state of an interface between an oxide semiconductor layer and an insulating film (gate insulating layer) in contact with the oxide semiconductor layer is favorable; and a method for manufacturing the transistor. In order to obtain the transistor, nitrogen is added to a region of the oxide semiconductor layer in the vicinity of the interface with the gate insulating layer. Specifically, a concentration gradient of nitrogen is formed in the oxide semiconductor layer, and a region containing much nitrogen is provided at the interface with the gate insulating layer. By the addition of nitrogen, a region with high crystallinity can be formed in the region of the oxide semiconductor layer in the vicinity of the interface with the gate insulating layer, so that a stable interface state can be obtained.

Claims (39)

1. A semiconductor device comprising:

a substrate;

a base insulating layer over the substrate;

an oxide semiconductor layer over the base insulating layer;

a gate insulating layer over the oxide semiconductor layer; and

a gate electrode layer over the gate insulating layer;

wherein the oxide semiconductor layer has a concentration gradient of nitrogen, which becomes higher as closer to the gate insulating layer, and has a concentration gradient of oxygen, which becomes higher as closer to the base insulating layer.

2. The semiconductor device according to claim 1 , wherein the oxide semiconductor layer is non-single-crystalline.

3. The semiconductor device according to claim 1 , wherein a region of the oxide semiconductor layer in a vicinity of an interface with the gate insulating layer has higher crystallinity than other regions of the oxide semiconductor layer.

4. The semiconductor device according to claim 1 , wherein a region of the oxide semiconductor layer in a vicinity of an interface with the gate insulating layer has a wurtzite crystal structure.

5. The semiconductor device according to claim 1 , wherein a nitrogen concentration of the oxide semiconductor layer in a vicinity of an interface with the gate insulating layer is higher than or equal to 1×10 20 /cm 3 and lower than 7 atomic %.

6. The semiconductor device according to claim 1 , wherein a nitrogen concentration of the oxide semiconductor layer in a vicinity of an interface with the base insulating layer is higher than or equal to 1×10 17 /cm 3 and lower than 5×10 19 /cm 3 .

7. A semiconductor device comprising:

a substrate;

a gate electrode layer over the substrate;

a first insulating layer in contact with the gate electrode layer;

an oxide semiconductor layer in contact with the first insulating layer; and

a second insulating layer in contact with the oxide semiconductor layer,

wherein the oxide semiconductor layer has a concentration gradient of nitrogen, which becomes higher as closer to the first insulating layer, and has a concentration gradient of oxygen, which becomes higher, as closer to the second insulating layer.

8. The semiconductor device according to claim 7 , wherein the oxide semiconductor layer is non-single-crystalline.

9. The semiconductor device according to claim 7 , wherein a region of the oxide semiconductor layer in a vicinity of an interface with the first insulating layer has higher crystallinity than other regions of the oxide semiconductor layer.

10. The semiconductor device according to claim 7 , wherein a region of the oxide semiconductor layer in a vicinity of an interface with the first insulating layer has a wurtzite crystal structure.

11. The semiconductor device according to claim 7 , wherein a nitrogen concentration of the oxide semiconductor layer in a vicinity of an interface with the first insulating layer is higher than or equal to 1×10 20 /cm 3 and lower than 7 atomic %.

12. The semiconductor device according to claim 7 , wherein a nitrogen concentration of the oxide semiconductor layer in a vicinity of an interface with the second insulating layer is higher than or equal to 1×10 17 /cm 3 and lower than 5×10 19 /cm 3 .

13. A semiconductor device comprising:

a substrate;

a gate electrode layer over the substrate;

a gate insulating layer over the gate electrode layer;

an oxide semiconductor layer over the gate insulating layer; and

a protective insulating layer over the oxide semiconductor layer;

wherein the oxide semiconductor layer has a concentration gradient of nitrogen, which becomes higher as closer to the gate insulating layer, and has a concentration gradient of oxygen, which becomes higher as closer to the protective insulating layer.

14. The semiconductor device according to claim 13 , wherein the oxide semiconductor layer is non-single-crystalline.

15. The semiconductor device according to claim 13 , wherein a region of the oxide semiconductor layer in a vicinity of an interface with the gate insulating layer has higher crystallinity than other regions of the oxide semiconductor layer.

16. The semiconductor device according to claim 13 , wherein a region of the oxide semiconductor layer in a vicinity of an interface with the gate insulating layer has a wurtzite crystal structure.

17. The semiconductor device according to claim 13 , wherein a nitrogen concentration of the oxide semiconductor layer in a vicinity of an interface with the gate insulating layer is higher than or equal to 1×10 20 /cm 3 and lower than 7 atomic %.

18. The semiconductor device according to claim 13 , wherein a nitrogen concentration of the oxide semiconductor layer in a vicinity of an interface with the protective insulating layer is higher than or equal to 1×10 17 /cm 3 and lower than 5×10 19 /cm 3 .

19. The semiconductor device according to claim 13 , wherein a thickness of the protective insulating layer is greater than or equal to 50 nm.

20. The semiconductor device according to claim 13 , further comprising a layer containing nitrogen between the gate electrode layer and the gate insulating layer,

wherein the layer containing nitrogen is in contact with the gate insulating layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 16, 2011
From: YAMAZAKI, SHUNPEI
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 027236/0681 →
Priority Claims (1)
JP 2010-267908 · Nov 30, 2010 · national
Continuity (1)
Related Publication 20120132905A1 · May 31, 2012