Semiconductor devices including silicide regions and methods of fabricating the same
A semiconductor device includes a semiconductor substrate, a gate electrode structure including a gate electrode located on an active region of the semiconductor substrate, first and second epitaxial regions located in the active region at opposite sides of the gate electrode structure, and first and second silicide layers on upper surfaces of the first and second epitaxial regions, respectively. The first and second epitaxial regions include Si—X, where X is one of germanium and carbon, and at least a portion of each of the first and second silicide layers is devoid of X and includes Si—Y, where Y is a metal or metal alloy.
1. A semiconductor device, comprising:
a semiconductor substrate;
a gate electrode structure comprising a gate electrode located on an upper surface of an active region of the semiconductor substrate;
first and second epitaxial regions located in the active region at opposite sides of the gate electrode structure, respectively, each of the first and second epitaxial regions having a top surface parallel with the upper surface of the active region, and at least one inclined surface extending at a downward inclination from the top surface;
an interlayer dielectric layer in which the gate electrode structure is disposed and covering the first and the second epitaxial regions, the interlayer dielectric layer having contact holes therein; and
silicon layers interposed between the interlayer dielectric layer and the first and second epitaxial regions, the silicon layers contacting the inclined surfaces of the first and second epitaxial regions; and
first and second silicide layers disposed in the contact holes in contact with the top surfaces of the first and second epitaxial regions, respectively, and
wherein both of the first and second epitaxial regions comprise Si—X, where X is one of germanium and carbon, and
wherein each of the first and second silicide layers is devoid of X, and both of the first and second silicide layers comprise Si—Y, where Y is a metal or metal alloy.
2. The semiconductor device of claim 1 , wherein Y is nickel, and the first and second silicide layers comprise Ni x Si 1-x , where (0≦x≦1).
3. The semiconductor device of claim 1 , wherein X is germanium, and the semiconductor device is a PMOS device.
4. The semiconductor device of claim 1 , wherein X is carbon, and the semiconductor device is an NMOS device.
5. The semiconductor device of claim 1 , wherein the first and second epitaxial regions protrude above an upper surface of the active region.
6. The semiconductor device of claim 1 , wherein an obtuse angle is subtended by the top surface and the inclined surface.
7. The semiconductor device of claim 1 , further comprising dielectric spacers covering the silicon layers, respectively.
8. The semiconductor device of claim 1 , wherein the substrate has a well including a channel region located beneath the gate electrode structure, and impurity regions which isolate the epitaxial regions from the channel region.
9. The semiconductor device of claim 8 , wherein the well is an N-well and the impurity regions comprise LDD structures.
10. The semiconductor device of claim 1 , wherein the semiconductor device is a PMOS device and each of the epitaxial regions also has an inclined side surface located below the upper surface of the active region and adjacent a side of the gate electrode structure, the inclined side surface extending downwardly at an inclination away from the gate electrode structure so as to lie in a plane that subtends an obtuse angle with the upper surface of the active region.
11. The semiconductor device of claim 10 , wherein the inclined surface which extends at a downward inclination from the top surface of each of the epitaxial regions adjoins the inclined side surface of the epitaxial region at a location beneath the upper surface of the active region.
12. The semiconductor device of claim 1 , further comprising a device isolation layer in the substrate and which demarcates the active region, and wherein the inclined surface which extends at a downward inclination from the top surface of each of the epitaxial regions adjoins the device isolation layer.
13. A semiconductor device, comprising:
a substrate including a first region and a second region;
a device isolation layer in the substrate and which demarcates a first active region in the first region of the substrate and a second active region in the second region of the substrate;
a PMOS transistor disposed at the first region of the substrate, the PMOS transistor comprising a first gate electrode located on an upper surface of the first active region,
first and second epitaxial regions located in the first active region at opposite sides of the first gate electrode, respectively, and first and second silicide layers,
wherein each of the first and second epitaxial regions has a top surface parallel with the upper surface of the active region, and at least one inclined surface extending at a downward inclination from the top surface, and
wherein both of the first and second epitaxial regions comprise SiGe;
an interlayer dielectric layer in which the gate electrode structure is disposed and covering the first and the second epitaxial regions, the interlayer dielectric layer having contact holes therein,
wherein the first and second silicide layers are disposed in the contact holes in contact with the top surfaces of the first and second epitaxial regions, respectively, and
wherein each of the first and second silicide layers is devoid of germanium, and both of the first and second silicide layers comprise Si—Y, where Y is a metal or metal alloy;
silicon layers interposed between the interlayer dielectric layer and the first and second epitaxial regions, the silicon layers contacting the inclined surfaces of the first and second epitaxial regions; and
an NMOS transistor disposed at the second region of the substrate and electrically connected to the PMOS.
14. The semiconductor device of claim 13 , wherein Y is nickel, and the first and second silicide layers comprise Ni x Si i-x , where (0≦x≦1).
15. The semiconductor device of claim 13 , wherein the first and second epitaxial regions protrude above the upper surface of the first active region.
16. The semiconductor device of claim 14 , wherein an obtuse angle is subtended by the top surface and the inclined surface.
17. The semiconductor device of claim 13 , wherein the NMOS transistor comprises a second gate electrode located on the second active region of the semiconductor substrate,
third and fourth epitaxial regions located in the second active region at opposite sides of the second gate electrode, respectively, the third and fourth epitaxial regions of the NMOS transistor both comprising SiC, and
third and fourth silicide layers on upper surfaces of the third and fourth epitaxial regions, respectively, wherein at least a portion of each of the third and fourth silicide layers is devoid of carbon and comprises Si—Y, where Y is a metal or metal alloy.