High efficiency thin film transistor device with gallium arsenide layer
Embodiments of the invention provide a method of forming a doped gallium arsenide based (GaAs) layer from a solution based precursor. The doped gallium arsenide based (GaAs) layer formed from the solution based precursor may assist solar cell devices to improve light absorption and conversion efficiency. In one embodiment, a method of forming a solar cell device includes forming a first layer with a first type of dopants doped therein over a surface of a substrate, forming a GaAs based layer on the first layer, and forming a second layer with a second type of dopants doped therein on the GaAs based layer.
1. A method of forming a thin film transistor, comprising:
forming a first layer with a first type of dopants doped therein over a surface of a substrate;
forming a GaAs based layer on the first layer by supplying a GaAs containing precursor disposed in a solvent to a processing chamber, wherein the GaAs containing precursor is selected from a group consisting of (NMe 2 ) 2 GaAs t BuH, Me 2 GaAs(NMe 2 ) 2 , Me 2 GaAs(SiMePh 2 ) 2 , Me 2 GaAs(SiPh 3 ) 2 , Et 2 GaAs(SiMe 2 Cy) 2 , and Me 2 GaAs(SiMe 2 Cy) 2 ; and
forming a second layer with a second type of dopants doped therein on the GaAs based layer.
2. The method of claim 1 , wherein forming the GaAs based layer comprises:
evaporating the GaAs containing precursor solvent in the processing chamber to form the GaAs based layer on the substrate.
3. The method of claim 1 , wherein the GaAs containing precursor is (NMe 2 ) 2 GaAs t BuH.
4. The method of claim 1 , further comprising:
annealing the GaAs based layer formed on the substrate.
5. The method of claim 1 , wherein the first type of dopants is a p-type dopant and the second type of dopants is a n-type dopant.
6. The method of claim 5 , wherein the p-type dopant includes at least one of metallic zinc dopants, dimethyl zinc (DMZ), diethyl zinc (DEZ), metallic magnesium dopants, cyclopentadienyl magnesium, carbon chlorine (CCl 4 ) or carbon bromide (CBr 4 ).
7. The method of claim 5 , wherein the n-type dopant includes at least one of H 2 S, sulfur, silane (SiH 4 ), disilane (Si 2 H 6 ), H 2 Se, Se or the like.
8. The method of claim 1 , wherein the first layer is a silicon containing layer or a GaAs based layer, and the second layer is a silicon containing layer or a GaAs based layer.
9. The method of claim 1 , wherein the first layer is a p-type amorphous silicon layer and the second layer is a n-type amorphous silicon layer.
10. The method of claim 1 , further comprising forming a plurality of carbon nanotubes over the surface of the substrate prior to forming the first layer on the substrate.
11. The method of claim 10 , further comprising:
filling the plurality of carbon nanotubes with a GaAs layer.
12. A method of forming a structure on a substrate suitable for use in a thin film transistor, comprising:
supplying a GaAs containing precursor in a solvent to a processing chamber, the GaAs containing precursor having p-type or n-type dopants disposed therein, wherein the GaAs containing precursor is selected from a group consisting of (NMe 2 ) 2 GaAs t BuH, Me 2 GaAs(NMe 2 ) 2 , Me 2 GaAs(SiMePh 2 ) 2 , Me 2 GaAs(SiPh 3 ) 2 , Et 2 GaAs(SiMe 2 Cy) 2 , and Me 2 GaAs(SiMe 2 Cy) 2 ; and
evaporating the solvent from the GaAs containing precursor with p-type dopants or n-type dopants in the processing chamber to form a p-type doped or n-type doped GaAs layer on the substrate.
13. The method of claim 12 , wherein the p-type dopants include at least one of metallic zinc dopants, dimethyl zinc (DMZ), diethyl zinc (DEZ), metallic magnesium dopants, cyclopentadienyl magnesium, carbon chlorine (CCl 4 ) or carbon bromide (CBr 4 ).
14. The method of claim 12 , wherein the n-type dopants include at least one of H 2 S, sulfur, silane (SiH 4 ), disilane (Si 2 H 6 ), H 2 Se, Se or the like.
15. The method of claim 12 , further comprising:
annealing the doped GaAs layer formed on the substrate.