Semiconductor device and method for manufacturing the same
A semiconductor device and a method for manufacturing the same are disclosed, which include a gate electrode material in a recess or a buried gate cell structure, a polysilicon material doped with impurities over a sidewall of a recess located over the gate electrode material, and a junction formed by an annealing or a rapid thermal annealing (RTA) process, thereby establishing a degree overlap between a gate electrode material of a buried gate and a junction.
1. A method for manufacturing a semiconductor device comprising:
forming a recess region by etching a semiconductor substrate;
filling a lower portion of the recess region to form a buried gate;
forming an insulation film along a top surface of the buried gate;
forming a polysilicon pattern over a sidewall of an upper portion of the recess region; and
forming a junction in the semiconductor substrate that is in contact with the polysilicon pattern.
2. The method according to claim 1 , wherein the forming of the polysilicon pattern includes:
forming a polysilicon layer over an entire surface including a sidewall of the recess region; and
etching the polysilicon layer so that portions of the polysilicon layer remain only over sidewalls of the recess region.
3. The method according to claim 1 , wherein the insulation film includes an oxide film or a nitride film.
4. The method according to claim 1 , the method further comprising forming a sealing insulation film over the polysilicon pattern between the step of forming of the polysilicon pattern and the step of forming of the junction.
5. The method according to claim 1 , wherein the polysilicon pattern is formed of a polysilicon film doped with impurities.
6. The method according to claim 1 , wherein the step of forming the junction comprises:
performing an annealing process or a RTA (Rapid Thermal Annealing) process to the polysilicon pattern to form the junction,
wherein the polysilicon pattern is doped with impurities.
7. The method according to claim 1 , wherein the step of forming an insulation film along the top surface of the buried gate comprises:
forming an insulation film over an entire surface including the buried gate and the semiconductor substrate; and
removing the insulation film from a sidewall of the recess region, and
wherein the method further comprising:
after the step of forming the polysilicon pattern over the sidewall of the upper portion of the recess region, forming a junction in the semiconductor substrate that is in contact with the polysilicon pattern.
8. The method according to claim 7 , wherein the step of forming the polysilicon pattern includes:
forming a polysilicon layer over an entire surface including sidewalls of the recess region; and
etching the polysilicon layer so that portions of the polysilicon layer remain only over the sidewalls of the recess region.