IP Library Granted Patent US 8,871,646
Granted Patent B2
US 8,871,646 · App. 13/947,792 · Granted Oct 28, 2014

Methods of forming a masking pattern for integrated circuits

Inventor: Anton DeVilliers (Boise, ID)
Assignee: Micron Technology, Inc.
H01L21/31144H01L27/1052H01L21/32139H01L21/3086H01L21/76816H01L21/0337H01L21/0273H01L21/0338H01L27/10H01L21/3088
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Quick Facts
Patent No.
US 8,871,646
App. No.
13/947,792
Granted
Oct 28, 2014
Kind
B2
Abstract

In some embodiments, methods for forming a masking pattern for an integrated circuit are disclosed. In one embodiment, mandrels defining a first pattern are formed in a first masking layer over a target layer. A second masking layer is deposited to at least partially fill spaces of the first pattern. Sacrificial structures are formed between the mandrels and the second masking layer. After depositing the second masking layer and forming the sacrificial structures, the sacrificial structures are removed to define gaps between the mandrels and the second masking layer, thereby defining a second pattern. The second pattern includes at least parts of the mandrels and intervening mask features alternating with the mandrels. The second pattern may be transferred into the target layer. In some embodiments, the method allows the formation of features having a high density and a small pitch while also allowing the formation of features having various shapes and sizes.

Claims (47)

1. A method for integrated circuit fabrication, the method comprising:

forming mandrels comprising mandrel material over a substrate, the mandrels separated by spaces;

depositing a filler material into the spaces;

forming sacrificial structures along an interface between the mandrels and the filler material;

removing the sacrificial structures to define a mask comprising open spaces delineated by mask features formed of the mandrel material and the filler material, wherein portions of the mask features at least partially block openings to the open spaces;

subjecting the mask features to an etch to remove the portions of the mask features at least partially blocking the openings; and

subsequently transferring a pattern derived from the mask features to the substrate.

2. The method of claim 1 , wherein forming the sacrificial structures comprises chemically altering portions of one or both of the mandrels and the filler material along the interface, wherein the chemically altered portions constitute the sacrificial structures.

3. The method of claim 2 , wherein chemically altering the portions comprises diffusing a chemically active species into the portions.

4. The method of claim 3 , further comprising depositing the chemically active species on the mandrels before depositing the filler material.

5. The method of claim 1 , wherein forming sacrificial structures is accomplished by diffusing the chemically active species into the mandrels before depositing the filler material.

6. The method of claim 2 , wherein the filler material comprises a photoresist, wherein chemically altering portions comprises diffusing chemically active species from the photoresist to the mandrels.

7. The method of claim 6 , wherein the filler material comprises an acid-based or base-based chemically amplified resist.

8. The method of claim 1 , wherein mask features formed by the mandrels and mask features formed by the filler material are at different heights after removing the sacrificial structures, further comprising:

etching tops of the mask features formed by the filler material, thereby substantially equalizing the heights of the mask features formed by the mandrels and the mask features formed by the filler material.

9. The method of claim 1 , further comprising:

blanket depositing a layer of spacer material conformally over the mask features and the target layer;

subjecting the layer of spacer material to a directional etch to form spacers at sides of the mask features;

removing the mask features to leave free standing spacers, wherein the spacers define the pattern transferred to the substrate.

10. The method of claim 1 , further comprising, after removing the sacrificial structures:

depositing additional masking material into open spaces between the mask features;

forming additional sacrificial structures at interfaces between the additional masking material and the mask features; and

removing the additional sacrificial structures, wherein the mask features and a remainder of the additional masking material form an additional mask pattern.

11. The method of claim 1 , further comprising, before subsequently transferring the pattern derived from the mask features to the substrate:

depositing a protective material into the gaps and over the mask features;

patterning the protective material to define additional mask features on a level above the mask features; and

transferring a pattern defined by the additional mask features to a same level as the mask features.

12. The method of claim 11 , wherein removing the sacrificial structures forms gaps, each gap defining a loop around each mandrel, and wherein:

patterning the protective material exposes ends of the mandrels; and

transferring the pattern defined by the additional mask features comprises etching at least portions of the exposed ends of the mandrels.

13. The method of claim 1 , wherein subjecting the mask features to the etch comprises performing an isotropic etch.

14. A method for integrated circuit fabrication, the method comprising:

forming a lower pattern of lines extending in a first direction, wherein forming the lower pattern comprises:

forming lower mandrels comprising lower mandrel material over a substrate, the lower mandrels separated by spaces;

depositing a lower filler material into the spaces;

forming lower sacrificial structures along an interface between the lower mandrels and the lower filler material; and

removing the lower sacrificial structures to define a lower mask comprising lower mask features formed of the lower mandrel material and the lower filler material; and

forming an upper pattern of lines above the lower pattern lines and extending in a second direction crossing the first direction, wherein forming the upper pattern comprises:

forming upper mandrels comprising upper mandrel material over the lower pattern of lines, the upper mandrels separated by spaces;

depositing an upper filler material into the spaces;

forming upper sacrificial structures along an interface between the upper mandrels and the upper filler material;

removing the upper sacrificial structures to define an upper mask comprising open spaces delineated by upper mask features formed of the upper mandrel material and the upper filler material, wherein portions of the mask features at least partially block openings to the open spaces; and

subjecting the upper mask features to an etch to remove the portions of the mask features at least partially blocking the opening; and

aggregating the lower and upper patterns to form an aggregate pattern in a masking layer; and

transferring the aggregate pattern to the substrate.

15. The method of claim 14 , further comprising subjecting the lower mask features to an etch to round top corners of the lower mask features.

16. The method of claim 15 , wherein subjecting the upper mask features to the etch rounds top corners of the upper mask features.

Assignments (7)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
Continuity (3)
Continuation 12546466 · Aug 24, 2009
Provisional Application 61117526 · Nov 24, 2008
Related Publication 20130309871A1 · Nov 21, 2013