Solar cell and method of its manufacture
The invention relates to a solar cell ( 1 ) comprising an emitter layer ( 11 ) at a front side ( 10 ) and a base layer ( 12 ) at the rear side ( 20 ). The solar collects first charge carriers at the front side ( 10 ) and second charge carriers at the rear side ( 20 ). The solar cell ( 1 ) further comprises at least one collecting point ( 14′ ) provided at the rear side ( 20 ) and a corresponding electrical conducting path to guide the first charge carriers from the front side ( 10 ) to the at least one collecting point ( 14′ ). An insulating layer ( 40 ) is provided between at least part of the electrical conducting path and the base layer ( 12 ) to provide electrical insulation between the electrical conductive path and the base layer ( 12 ).
1. A method of manufacturing a solar cell, comprising:
(a) providing a semiconductor substrate comprising
(i) a front side ( 10 )
(ii) a rear side ( 20 ), and
(iii) a base layer ( 12 ) at the rear side ( 20 );
(b) forming an emitter layer ( 11 ) on the front side ( 10 ) of the semiconductor substrate,
(c) forming at least one electrical conducting path from the front side ( 10 ) to a corresponding collecting point ( 14 ′) at the rear side ( 20 ), which electrical conducting path is in the form of a conductive material in the path which material comprises a conductive compound and an oxide-containing compound or silicate, and
(d) forming an insulating layer ( 40 ) at the outside of the electrical conducting path to provide insulation between the electrical conducting path and the base layer ( 12 ), wherein forming the insulating layer ( 40 ) comprises performing
(i) an annealing process on the electrical conducting path, and
(ii) during or after the annealing, an oxidation of the conductive material forming an oxide layer on the conductive material.
2. The method according to claim 1 , wherein:
the electrical conducting path is a via ( 30 ) extending at least through the base layer ( 12 ), and
in said forming step (d) the insulating layer ( 40 ) is formed around at least part of the via ( 30 ) to provide insulation between the via ( 30 ) and the base layer ( 12 ).
3. The method according to claim 1 , wherein step (c) comprises forming the at least one electrical conducting path along a side edge ( 17 ) of the solar cell ( 1 ), wherein the insulating layer ( 40 ) is located between the electrical conducting path and the base layer ( 12 ) to provide insulation between the conductive material and the base layer ( 12 ).
4. The method according to claim 1 , wherein the annealing of step (d) is performed at an annealing temperature in the range of 300° C. to 1000° C., over a time period in the range of 0.1 to 1000 seconds.
5. The method according to claim 1 , wherein step (c) comprises a process that removes material from the semiconductor substrate to create a hole along which the electrical conducting path is to be formed, wherein after creating the hole, the insulating layer is formed without an intermediate step of etching walls of the hole.
6. The method according to claim 5 , wherein the removing process comprises laser-drilling to create the hole at the location at which the via is to be formed.