IP Library › Granted Patent US 8,884,641
Granted Patent B2
US 8,884,641 · App. 13/259,821 · Granted Nov 11, 2014

Methods and system for electrostatic discharge protection of thin-film transistor backplane arrays

Inventors: Edward J. Bawolek (Chandler, AZ); Curtis D. Moyer (Phoenix, AZ); Sameer M. Venugopal (San Jose, CA)
Assignee: Arizona Board of Regents, a Body Corporated of the State of Arizona Acting for and on Behalf of Arizona State University
G09G3/006G01R31/2621G01R31/2642G01R31/2607G01R31/26G09G2320/0295G09G2330/04G09G2330/10G09G2330/12
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Quick Facts
Patent No.
US 8,884,641
App. No.
13/259,821
Granted
Nov 11, 2014
Kind
B2
Abstract

The present invention provides devices and methods for testing the electrical performance of thin-film transistor backplane arrays and protecting thin-films during testing and handling.

Claims (21)

1. A device for testing a thin-film transistor backplane array comprising:

a first decoder electrically coupled to each of a plurality of row connections on a thin-film transistor backplane array;

a second decoder electrically coupled to each of a plurality of column connections on the thin-film transistor backplane array, wherein the first decoder and the second decoder reside on the same substrate as the thin-film transistor backplane array; and

an electrical component capable of providing a severable electrical connection between a first portion of the device and a second portion of the device, wherein the electrical component comprises a three-terminal fuse that is capable of being activated to sever the electrical connection.

2. The device of claim 1 wherein the first portion of the device is a decoder address line.

3. The device of claim 1 wherein the first portion of the device is a decoder bias line.

4. The device of claim 1 wherein the first portion of the device is a decoder address line and the second portion of the device is a decoder bias line.

5. The device of claim 4 wherein the first decoder is a 1×N decoder.

6. The device of claim 4 wherein the second decoder is a 1×M decoder.

7. The device of claim 6 wherein the second decoder is a 2×N decoder.

8. The device of claim 1 wherein at least a portion of the first decoder and at least a portion of the second decoder comprises amorphous silicon.

9. The device of claim 1 wherein the electrical component providing a severable connection between a first portion of the device and a second portion of the device comprises an electrostatic discharge protection component.

10. The device of claim 9 wherein the electrostatic discharge protection component establishes an electrical connection between at least two portions of the device in response to the presence of an electrical current with a magnitude greater than a predetermined level.

11. The device of claim 9 wherein the electrostatic discharge protection component establishes an electrical connection between at least two portions of the device in response to the presence of a voltage with a magnitude greater than a predetermined level.

12. The device of claim 8 wherein:

the first decoder is a 1×N decoder;

the second decoder is a 1×M decoder; and

the electrical component capable of providing a severable connection between the first portion of the device and the second portion of the device comprises an electrostatic discharge protection component.

13. The device of claim 8 wherein:

the first decoder is a 1×N decoder; and

the second decoder is a 1×M decoder.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 23, 2011
From: BAWOLEK, EDWARD J.; MOYER, CURTIS D.; VENUGOPAL, SAMEER M.
To: ARIZONA BOARD OF REGENTS, A BODY CORPORATE OF THE STATE OF ARIZONA ACTING FOR AND ON BEHALF OF ARIZONA STATE UNIVERSITY
Reel/Frame 027276/0516 →
Continuity (2)
Provisional Application 61172500 · Apr 24, 2009
Related Publication 20120062271A1 · Mar 15, 2012