System and method for soft-starting a power converter with a pre-charged output

1. A method for soft-starting a voltage generator comprising:

disabling an output driver;

detecting the voltage on an output node;

ramping a reference voltage at a controlled rate from a predetermined first level until the reference voltage reaches a second level that is a predetermined function of said output node voltage;

enabling the output driver when the reference voltage reaches said second level; and

ramping the reference voltage and the output node voltage at a controlled rate to a boot voltage level.

2. The method of claim 1 , wherein said second level is equal to the output node voltage.

3. The method of claim 1 , wherein, once the reference voltage reaches said second level, the reference voltage is ramped down to said boot voltage level if said output node voltage is greater than said boot voltage level and is ramped up to said boot voltage level if said output node voltage is less than said boot voltage level.

4. The method of claim 1 , wherein, once said reference voltage is ramped to said boot voltage level, a power good signal is generated.

5. The method of claim 1 further comprising generating a start signal to start the ramping of said reference voltage from said first level.

6. The method of claim 1 wherein said first level is ground.

7. The method of claim 1 wherein said first level is a voltage above said second level and said boot voltage level.

8. A soft-start circuit for an output voltage generator having an output node comprising:

an output driver;

a first voltage generator for generating a reference voltage;

a ramp generator for causing the first voltage generator to ramp the reference voltage at a controlled rate starting from a predetermined first voltage level; and

a first comparator for comparing the voltage on said output node and said reference voltage and for generating a first signal when the voltage on said output node is substantially unequal to said reference voltage and a second signal when the voltage on said output node is substantially equal to said reference voltage, said first signal causing said output driver to be disabled, and said second signal causing said ramp generator to ramp the reference voltage to a boot voltage level and enabling said output driver to cause the voltage on said output node to ramp at a controlled rate to said boot voltage level.

9. The soft-start circuit of claim 8 wherein, in response to said second signal, said output driver causes the voltage on said output node to ramp to said boot voltage level at substantially the same rate as said reference voltage.

10. The soft-start circuit of claim 8 further comprising a second comparator for generating a power good signal when the voltage on said output node substantially equals said boot voltage level.

11. The soft-start circuit of claim 8 , wherein, once the reference voltage is substantially equal to the voltage on said output node, said ramp generator causes the reference voltage to ramp down to said boot voltage level if said output node voltage is greater than said boot voltage level and causes the reference voltage to ramp up to said boot voltage level if said output node voltage is less than said boot voltage level.

12. The soft-start circuit of claim 8 , wherein said ramp generator starts ramping from a predetermined first voltage level in response to receipt of a start signal.

13. The soft-start circuit of claim 8 , wherein said predetermined first voltage level is ground.

14. The soft-start circuit of claim 8 , wherein said predetermined first voltage level is a voltage above the voltage on said output node and above said boot voltage level.

15. The soft-start circuit of claim 8 , wherein said output voltage generator comprises a DC-DC power converter.

16. The soft-start circuit of claim 8 , wherein said output voltage generator further comprises a buck converter for generating the output voltage at said output node, a compensation circuit, and a pulse width modulator, said compensation circuit for generating a compensation signal that is a function of the extent to which the voltage on said output node is above or below said reference voltage, and said pulse width modulator for generating a pulse width modulated signal responsive to said compensation signal that is coupled to said output driver which generates a drive signal for controlling the operation of said buck converter.

17. The soft-start circuit of claim 8 , wherein said first voltage generator is a digital to analog converter, and wherein said ramp generator comprises a digital comparator and a digital up/down counter.

18. The soft-start circuit of claim 17 , wherein said boot voltage level comprises a predetermined count of said digital counter, and wherein said digital comparator causes said digital counter to stop counting when the current count of said digital counter equals said boot voltage level count.

19. The soft-start circuit of claim 8 , wherein said first voltage generator is a transconductance amplifier and a capacitor connected between the output of said transconductance amplifier and ground, and wherein said ramp generator comprises an analog multiplexer for determining whether the output of the transconductance amplifier ramps to a maximum reference voltage or to said boot voltage level.

20. A system comprising:

a power converter that converts an input voltage to a regulated output voltage at an output node;

a load coupled to said output node; and

a soft-start circuit for soft starting said power converter, comprising:

an output driver;

a first voltage generator for generating a reference voltage;

a ramp generator for causing the first voltage generator to ramp the reference voltage at a controlled rate starting from a predetermined first voltage level; and

a first comparator for comparing the voltage on said output node and said reference voltage and for generating a first signal when the voltage on said output node is greater than said reference voltage and a second signal when the voltage on said output node is substantially equal to said reference voltage, said first signal causing said output driver to be disabled, and said second signal causing said ramp generator to ramp the reference voltage to a boot voltage level and enabling said output driver to cause the voltage on said output node to ramp at a controlled rate to said boot voltage level.

21. The system of claim 20 , wherein said load is selected from one of a group consisting of a processor, a memory, and a bus.