IP Library Granted Patent US 8,904,094
Granted Patent B2
US 8,904,094 · App. 13/558,866 · Granted Dec 2, 2014

Memory system in which extended function can easily be set

Inventors: Shinichi Matsukawa (Tokyo, JP); Akihisa Fujimoto (Kanagawa-ken, JP)
Assignee: Kabushiki Kaisha Toshiba
G06F12/00
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Quick Facts
Patent No.
US 8,904,094
App. No.
13/558,866
Granted
Dec 2, 2014
Kind
B2
Abstract

According to one embodiment, a nonvolatile semiconductor memory device, a controller, an extended function section, and an extension register. The controller controls the nonvolatile semiconductor memory device. The extended function section is controlled by the controller. The extension register which is provided with a certain block length capable of defining an extended function of the extended function section. The controller processes a first command to write header data of a command to operate the extended function section to the extended function section through the extension register, and a second command to read header data of a response from the extended function section through the extension register.

Claims (23)

1. A memory system, comprising:

a nonvolatile semiconductor memory device;

a controller configured to control the nonvolatile semiconductor memory device;

an extended function section to be controlled by the controller; and

an extension register provided with a certain block length capable of defining an extended function of the extended function section,

wherein the controller processes a first command to write header data of a command to operate the extended function section to the extended function section through the extension register, and a second command to read header data of a response from the extended function section through the extension register,

wherein the controller processes a third command to write variable-length command data to the extended function section, and a fourth command to read variable-length response data from the extended function section,

wherein the third command comprises a field configured to specify a block size and a block number of the variable-length command data, and the fourth command comprises a field configured to specify a block size and a block number of the variable-length response data, and

wherein, upon receipt of one of the first to fourth commands, the memory device returns a response, and the response includes a first flag indicating that an event has occurred in the extended function section.

2. A memory system, comprising:

a non-transitory medium;

a controller configured to control the non-transitory medium;

a memory serving as a work area connected to the controller;

an extension function section to be controlled by the controller; and

an extension register provided on the memory, and provided with a certain block length capable of defining an extension function of the extension function section,

wherein the controller processes a first command to write header data of a command to operate the extension function section to the extension function section through the extension register, and in the case receiving of the first command, the memory device returns a response, and the response includes a first flag indicating that an event has occurred in the extension function section.

3. A memory system, comprising:

a non-transitory medium;

a controller configured to control the non-transitory medium;

a memory serving as a work area connected to the controller;

an extension function section to be controlled by the controller; and

an extension register provided on the memory, and provided with a certain block length capable of defining an extension function of the extension function section,

wherein the controller processes a first command read header data of a response from the extension function section through the extension register, and in the case receiving of the first command, the memory device returns a response, and the response includes a first flag indicating that an event has occurred in the extension function section.

Assignments (5)
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 055669/0401 →
MERGER Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K. PANGEA
Reel/Frame 055659/0471 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 055669/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 24, 2017
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 043709/0035 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 22, 2012
From: MATSUKAWA, SHINICHI; FUJIMOTO, AKIHISA
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 029165/0352 →
Priority Claims (1)
JP P2012-152877 · Jul 6, 2012 · national
Continuity (1)
Related Publication 20140013062A1 · Jan 9, 2014