Method for fabricating trench type transistor
A method for fabricating a trench type transistor. An epitaxial layer is provided on a semiconductor substrate. A hard mask with an opening is formed on the epitaxial layer. A gate trench is etched into the substrate through the opening. A gate oxide layer and a trench gate are formed within the gate trench. After forming a cap layer atop the trench gate, the hard mask is removed. An ion well and a source doping region are formed in the epitaxial layer. A spacer is then formed on a sidewall of the trench gate and the cap layer. Using the cap layer and the spacer as an etching hard mask, the epitaxial layer is etched in a self-aligned manner, thereby forming a contact hole.
1. A method for fabricating a trench type transistor device, comprising:
providing a semiconductor substrate;
forming an epitaxial layer on the semiconductor substrate;
forming a hard mask layer on the epitaxial layer, the hard mask layer comprising at least an opening;
through the opening, etching a gate trench into the epitaxial layer;
forming a gate oxide layer in the gate trench;
forming a gate within the gate trench, wherein the gate within the gate trench has a top surface that is higher than a top surface of the epitaxial layer;
forming a cap layer on the gate;
after forming the cap layer, removing the hard mask layer to thereby revealing the top surface of the epitaxial layer;
after removing the hard mask layer, performing an oxidation to form a silicon oxide layer at least on the top surface of the epitaxial layer;
after forming the silicon oxide layer on the top surface of the epitaxial layer, forming an ion well within the epitaxial layer;
forming a source doping region within the ion well;
forming a spacer on sidewall of the cap layer and the gate; and
self-aligned etching the epitaxial layer using the cap layer and the spacer as an etching hard mask, thereby forming a contact hole.
2. The method for fabricating a trench type transistor device according to claim 1 wherein the semiconductor substrate is an N type heavily doped silicon substrate and acts as a drain of the trench type transistor device.
3. The method for fabricating a trench type transistor device according to claim 2 wherein the epitaxial layer is an N type epitaxial silicon layer.
4. The method for fabricating a trench type transistor device according to claim 3 wherein the ion well is a P well.
5. The method for fabricating a trench type transistor device according to claim 4 wherein the source doping region is an N type source doping region.
6. The method for fabricating a trench type transistor device according to claim 1 wherein the hard mask comprises silicon oxide or silicon nitride.
7. The method for fabricating a trench type transistor device according to claim 1 wherein the cap layer comprises silicon nitride.
8. The method for fabricating a trench type transistor device according to claim 1 wherein the spacer comprises silicon nitride.