Hybrid phase-locked loops

1. A circuit comprising:

an oscillator configured to generate an output signal based on an analog signal and a digital signal;

a controller configured to generate an offset signal based on a comparison of a first analog control signal and a second analog control signal;

a divider communicatively coupled to the controller and configured to:

generate a divisor signal based on the offset signal; and

generate a feedback signal based on the output signal and the divisor signal;

an analog control signal unit configured to generate the second analog control signal based on the feedback signal and a reference signal; and

a coupling unit configured to select either the first analog control signal or the second analog control signal as the analog signal.

2. The circuit of claim 1 , further comprising a digital control signal unit configured to generate a digital control signal based on the reference signal and the output signal that is provided to the oscillator as the digital signal.

3. The circuit of claim 2 , wherein the digital control signal unit operates to generate the digital control signal when the coupling unit selects the first analog control signal as the analog signal.

4. The circuit of claim 2 , wherein the digital control signal unit does not operate to generate the digital control signal when the coupling unit selects the second analog control signal as the analog signal.

5. The circuit of claim 4 , further comprising a latch, the latch configured to latch the digital control signal during operation of the digital control signal unit and to provide a second digital control signal related to or equal to the latched digital control signal to the oscillator as the digital signal when the digital control signal unit does not operate to generate the digital control signal.

6. The circuit of claim 1 , wherein the first analog control signal is a particular voltage.

7. The circuit of claim 1 , wherein the coupling unit is configured to select the second analog control signal after the second analog control signal approximates the first analog control signal.

8. A circuit comprising:

an oscillator configured to generate an output signal based on an analog signal and a digital signal;

a digital phase-locked loop that includes the oscillator and is configured to generate a digital control signal based on a reference signal and a first feedback signal based on the output signal and provide the digital control signal to the oscillator as the digital signal;

a controller configured to generate an offset signal based on a comparison of a first analog control signal and a second analog control signal;

an analog phase-locked loop that includes the oscillator and is configured to generate the second analog control signal based on a second feedback signal and the reference signal, the analog phase-locked loop configured to adjust the second analog control signal based on the offset signal such that the second analog control signal approximates the first analog control signal; and

a coupling unit configured to select the first analog control signal as the analog signal when the digital phase-locked loop is operating and to select the second analog control signal as the analog signal after the second analog control signal approximates the first analog control signal.

9. The circuit of claim 8 , wherein the analog phase-locked loop includes a divider, the divider configured to divide the output signal by a divisor to generate the second feedback signal.

10. The circuit of claim 9 , wherein the divisor is selected based on the offset signal.

11. The circuit of claim 8 , wherein the second analog control signal is a particular voltage.

12. The circuit of claim 8 , wherein the controller is configured to generate the offset signal when the digital phase-locked loop is operating and a frequency of the first feedback signal approximates a frequency of the reference signal, respectively.

13. The circuit of claim 8 , wherein the digital phase-locked loop is not operating when the second analog control signal is the analog signal.

14. The circuit of claim 13 , further comprising a latch configured to latch the digital control signal generated by the digital phase-locked loop when the digital phase-locked loop is operating and to provide a second digital control signal related to or equal to the latched digital control signal to the oscillator as the digital signal when the digital phase-locked loop is not operating.

15. A method of implementing a hybrid phase-locked loop, the method comprising:

generating an output signal using an oscillator, the output signal based on a first analog control signal and a digital control signal, the digital control signal generated by a digital phase-locked loop that includes the oscillator;

generating a second analog control signal by an analog phase-locked loop that includes the oscillator, the second analog control signal based on a phase difference between a reference signal and a feedback signal based on the output signal;

comparing the first analog control signal and the second analog control signal;

adjusting the feedback signal based on the comparison of the first analog control signal and the second analog control signal to cause the second analog control signal to approximate the first analog control signal; and

after the second analog control signal approximates the first analog control signal, generating the output signal based on the second analog control signal.

16. The method of claim 15 , further comprising latching the digital control signal, wherein after the second analog control signal approximates the first analog control signal, the output signal is generated based on the second analog control signal and a second digital control signal related to or equal to the latched digital control signal.

17. The method of claim 15 , wherein the digital phase-locked loop is operating when the output signal is based on the first analog control signal and the digital phase-locked loop is not operating when the output signal is based on the second analog control signal.

18. The method of claim 15 , further comprising

providing the first analog control signal to the oscillator; and

after the second analog control signal approximates the first analog control signal, switching to provide the second analog control signal to the oscillator so that the output signal is based on the second analog control signal.

19. The method of claim 15 , wherein the first analog control signal is a particular voltage.

20. The method of claim 15 , wherein adjusting the feedback signal includes adjusting a divisor that divides the output signal to generate the feedback signal.