IP Library Granted Patent US 8,922,268
Granted Patent B2
US 8,922,268 · App. 13/936,176 · Granted Dec 30, 2014

Adjustable gate and/or body resistance for improved intermodulation distortion performance of radio-frequency switch

Inventors: Anuj Madan (Cambridge, MA); Fikret Altunkilic (North Andover, MA); Guillaume Alexandre Blin (Carlisle, MA)
Assignee: Skyworks Solutions, Inc.
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,922,268
App. No.
13/936,176
Granted
Dec 30, 2014
Kind
B2
Abstract

Radio-frequency (RF) switch circuits are disclosed having adjustable resistance to provide improved switching performance. RF switch circuits include at least one field-effect transistor (FET) disposed between first and second nodes, each of the FET having a respective gate and body. An adjustable-resistance circuit is connected to either or both of the respective gate and body of the FET(s).

Claims (24)

1. A radio-frequency (RF) switch comprising:

at least one field-effect transistor (FET) disposed between first and second nodes, each of the FET having a respective gate and body; and

an adjustable-resistance circuit connected to either or both of the respective gate and body of the at least one FET, the adjustable-resistance circuit including a first resistor in series with a parallel combination of a second resistor and a bybass switch.

2. The RF switch of claim 1 wherein the FET is a silicon-on-insulator (SOI) FET.

3. The RF switch of claim 1 wherein the bypass switch being closed results in the second resistor being bypassed to yield a first resistance for the adjustable-resistance, and the bypass switch being open results in a second resistance that is greater than the first resistance by approximately the value of the second resistor.

4. The RF switch of claim 3 wherein the first resistance includes a bias resistance.

5. The RF switch of claim 4 wherein the second resistance is selected to improve intermodulation distortion (IMD) performance, and the first resistance is selected to yield a reduced impact on switching time of the FET.

6. The RF switch of claim 1 wherein the adjustable-resistance circuit is connected to the gate.

7. The RF switch of claim 6 further comprising a second adjustable-resistance circuit connected to the body.

8. The RF switch of claim 6 further comprising a diode body contact connected to the body.

9. The RF switch of claim 1 wherein the adjustable-resistance circuit is connected to the body but not the gate.

10. The RF switch of claim 1 wherein the first node is configured to receive an RF signal having a power value and the second node is configured to output the RF signal when the FET is in an ON state.

11. The RF switch of claim 10 wherein the at least one FET includes N FETs connected in series, the quantity N selected to allow the switch circuit to handle the power of the RF signal.

12. A method for operating a radio-frequency (RF) switch, the method comprising:

controlling at least one field-effect transistor (FET) disposed between first and second nodes so that each of the at least one FET is in an ON state or an OFF state; and

adjusting a resistance of a circuit connected to either or both of a respective gate and body of each of the at least one FET, the resistance including a first and a second resistors and the adjusting including bypassing one of the first and the second resistors that are connected in series.

13. A radio-frequency (RF) switch module comprising:

a packaging substrate configured to receive a plurality of components;

a semiconductor die mounted on the packaging substrate, the die including at least one field-effect transistor (FET); and

an adjustable-resistance circuit connected to either or both of a respective gate and body of each of the at least one FET, the adjustable-resistance circuit including a first resistor in series with a parallel combination of a second resistor and a bypass switch.

14. The switch module of claim 13 wherein the semiconductor die is a silicon-on-insulator (SOI) die.

15. The switch module of claim 13 wherein the adjustable-resistance circuit is part of the same semiconductor die as the at least one FET.

16. The switch module of claim 13 wherein the adjustable-resistance circuit is part of a second die mounted on the packaging substrate.

17. The switch module of claim 13 wherein the adjustable-resistance circuit is disposed at a location outside of the semiconductor die.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 3, 2014
From: MADAN, ANUJ; ALTUNKILIC, FIKRET; BLIN, GUILLAUME ALEXANDRE
To: SKYWORKS SOLUTIONS, INC.
Reel/Frame 032335/0868 →
Continuity (2)
Provisional Application 61669047 · Jul 7, 2012
Related Publication 20140009206A1 · Jan 9, 2014