IP Library Granted Patent US 8,929,220
Granted Patent B2
US 8,929,220 · App. 13/593,707 · Granted Jan 6, 2015

Processing system using virtual network interface controller addressing as flow control metadata

Inventors: Mauricio Breternitz, Jr. (Austin, TX); Anton Chernoff (Littleton, MA); Mark D. Hummel (Franklin, MA)
Assignee: Advanced Micro Devices, Inc.
H04L49/10H04L47/10
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,929,220
App. No.
13/593,707
Granted
Jan 6, 2015
Kind
B2
Abstract

In a processing system comprising a plurality of processing nodes coupled via a switching fabric, a method includes implementing a flow control property for a data flow in the switching fabric based on an addressing property of an address of a virtual network interface controller associated with the data flow. A switching fabric includes a plurality of ports, each port coupleable to a corresponding processing node, and switching logic coupled to the plurality of ports. The switching fabric further includes flow control logic to implement a flow control property for a data flow in the switching logic based on an addressing property of an address of a virtual network interface controller associated with the data flow.

Claims (70)

1. In a processing system comprising a plurality of processing nodes coupled via a switching fabric, a method comprising:

implementing a flow control property for a data flow in the switching fabric based on an addressing property of an address of a virtual network interface controller associated with the data flow.

2. The method of claim 1 , wherein implementing the flow control property comprises:

accessing, at the switching fabric, the address from an address field of a packet associated with the data flow;

identifying, at the switching fabric, the flow control property in response to identifying the accessed address as having the addressing property; and

implementing the flow control property for transporting the packet between ports of the switching fabric.

3. The method of claim 2 , wherein:

the virtual network interface controller comprises a virtual network interface controller associated with a source of the data flow; and

the address field comprises a source address field.

4. The method of claim 2 , wherein:

the virtual network interface controller comprises a virtual network interface controller associated with a destination of the data flow; and

the address field comprises a destination address field.

5. The method of claim 1 , further comprising:

identifying, at a processing node of the plurality of processing nodes, the flow control property to be implemented for the data flow;

identifying the addressing property associated with the identified flow control property;

selecting the address based on the identified addressing property; and

instantiating the virtual network interface controller with the selected address at the processing node.

6. The method of claim 5 , wherein the switching fabric identifies the addressing property and selects the address.

7. The method of claim 1 , wherein the flow control property comprises at least one of: a flow priority; a bandwidth property; a throughput property; an error rate property; a jitter property; and a replication property.

8. The method of claim 1 , wherein the addressing property comprises at least one of: a parity of the digits of at least a subset of the numeral positions of the address; the address being in a specified address range; a specified digit at a specified numeral position of the address; a specified set of one or more digits at a specified subset of one or more numeral positions of the address; and a result of an arithmetic or logical operation using digits of at least a subset of the numeral positions of the address.

9. The method of claim 1 , wherein the address comprises one of a media access control (MAC) address or an Internet Protocol (IP) address.

10. In a processing system comprising a plurality of processing nodes coupled via a switching fabric, a method comprising:

identifying, at a processing node of the plurality of processing nodes, an addressing property associated with a flow control property to be implemented for a data flow;

selecting an address based on the identified addressing property; and

instantiating a virtual network interface controller with the selected address at the processing node.

11. The method of claim 10 , further comprising:

assigning the address to a packet of the data flow; and

providing the packet to the switching fabric for transmission.

12. The method of claim 10 , wherein identifying the addressing property comprises:

indexing a table based on the flow control property, the table representing mappings between addressing properties and flow control properties.

13. The method of claim 10 , wherein the flow control property comprises at least one of: a flow priority; a quality-of-service property; a bandwidth property; a throughput property; an error rate property; a jitter property; and a replication property.

14. The method of claim 10 , wherein the addressing property comprises at least one of: a parity of the digits of at least a subset of the numeral positions of the address; the address being in a specified address range; a specified digit at a specified numeral position of the address; a specified set of one or more digits at a specified subset of one or more numeral positions of the address; and a result of an arithmetic or logical operation using digits of at least a subset of the numeral positions of the address.

15. A switching fabric comprising:

a plurality of ports, each port configured to couple to a corresponding processing node;

switching logic coupled to the plurality of ports; and

flow control logic to implement a flow control property for a data flow in the switching logic based on an addressing property of an address of a virtual network interface controller associated with the data flow.

16. The switching fabric of claim 15 , wherein the flow control logic is to implement the flow control property by:

accessing the address from an address field of a packet associated with the data flow;

identifying the flow control property in response to identifying the accessed address as having the addressing property; and

controlling processing of the packet by the switching logic based on the identified flow control property.

17. The switching fabric of claim 15 , further comprising:

a memory to store a data structure representing mappings between addressing properties and flow control properties; and

wherein the switching fabric is to identify the flow control property by accessing the data structure responsive to identifying the addressing property.

18. The switching fabric of claim 15 , wherein the addressing property comprises at least one of: a parity of the digits of at least a subset of the numeral positions of the address; the address being in a specified address range; a specified digit at a specified numeral position of the address; a specified set of one or more digits at a specified subset of one or more numeral positions of the address; and a result of an arithmetic or logical operation using digits of at least a subset of the numeral positions of the address.

19. The switching fabric of claim 15 , wherein the flow control property comprises at least one of: a flow priority; a bandwidth property; a throughput property; an error rate property; a jitter property; and a replication property.

20. A processing system comprising the switching fabric of claim 15 , the processing system further comprising a processing node coupled to a port of the plurality of ports, wherein the processing node is to:

identify the flow control property to be implemented for the data flow;

identify the addressing property based on the identified flow control property;

select the address based on the identified addressing property; and

instantiate the virtual network interface controller with the selected address at the processing node.

21. The processing system of claim 20 , wherein the addressing property comprises at least one of: a parity of the digits of at least a subset of the numeral positions of the address; the address being in a specified address range; a specified digit at a specified numeral position of the address; a specified set of one or more digits at a specified subset of one or more numeral positions of the address; and a result of an arithmetic or logical operation using digits of at least a subset of the numeral positions of the address.

22. The processing system of claim 21 , wherein the flow control property comprises at least one of: a flow priority; a bandwidth property; a throughput property; an error rate property; a jitter property; and a replication property.

23. The processing system of claim 22 , wherein:

the switching fabric comprises an interconnect; and

the plurality of processing nodes comprise field replaceable units (FRUs) connected to the interconnect.

24. A processing node comprising:

a network interface controller configured to couple to a switching fabric;

a processor coupled to the network interface; and

a memory coupled to the processor, the memory storing a set of instructions to manipulate the processor to:

identify an addressing property associated with a flow control property to be implemented for a data flow to be communicated via the switching fabric;

select an address based on the identified addressing property; and

instantiate a virtual network interface controller with the selected address at the processing node.

25. The processing node of claim 24 , wherein the set of instructions further is to manipulate the processor to:

assign the address to a packet of the data flow; and

provide the packet to the switching fabric for transmission.

26. The processing node of claim 24 , further comprising a memory to store a data structure representing mappings between addressing properties and flow control properties, and wherein the set of instructions is to manipulate the processor to identify the addressing property by:

accessing the data structure based on a representation of the flow control property.

27. The processing node of claim 24 , wherein:

the flow control property comprises at least one of: a flow priority; a bandwidth property; a throughput property; an error rate property; a jitter property; and a replication property; and

the addressing property comprises at least one of: a parity of the digits of at least a subset of the numeral positions of the address; the address being in a specified address range; a specified digit at a specified numeral position of the address; a specified set of one or more digits at a specified subset of one or more numeral positions of the address; and a result of an arithmetic or logical operation using digits of at least a subset of the numeral positions of the address.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 24, 2012
From: BRETERNITZ, MAURICIO, JR.; CHERNOFF, ANTON; HUMMEL, MARK D.
To: ADVANCED MICRO DEVICES, INC.
Reel/Frame 028843/0592 →
Continuity (1)
Related Publication 20140056141A1 · Feb 27, 2014