Semiconductor device and method for manufacturing the same
View Patent ↗A semiconductor device in which fluctuation in electric characteristics due to miniaturization is less likely to be caused is provided. The semiconductor device includes an oxide semiconductor film including a first region, a pair of second regions in contact with side surfaces of the first region, and a pair of third regions in contact with side surfaces of the pair of second regions; a gate insulating film provided over the oxide semiconductor film; and a first electrode that is over the gate insulating film and overlaps with the first region. The first region is a CAAC oxide semiconductor region. The pair of second regions and the pair of third regions are each an amorphous oxide semiconductor region containing a dopant. The dopant concentration of the pair of third regions is higher than the dopant concentration of the pair of second regions.
1. A semiconductor device comprising:
an oxide semiconductor film comprising:
a first region;
a pair of second regions, the first region located between the pair of second regions; and
a pair of third regions, the first region and the pair of second regions located between the pair of third regions;
a gate insulating film over the oxide semiconductor film; and
a first electrode over the gate insulating film and overlapping with the first region,
wherein the first region is a c-axis aligned crystalline oxide semiconductor region,
wherein each of the pair of second regions and the pair of third regions is an amorphous oxide semiconductor region comprising a dopant,
wherein a dopant concentration of the pair of third regions is higher than a dopant concentration of the pair of second regions, and
wherein the gate insulating film overlaps with the pair of third regions.
2. The semiconductor device according to claim 1 , further comprising:
a second electrode electrically connected to one of the pair of third regions; and
a third electrode electrically connected to the other of the pair of third regions.
3. The semiconductor device according to claim 2 ,
wherein the second electrode is in contact with a top surface of the one of the pair of third regions, and
wherein the third electrode is in contact with a top surface of the other of the pair of third regions.
4. The semiconductor device according to claim 2 ,
wherein the second electrode is in contact with a bottom surface of the one of the pair of third regions, and
wherein the third electrode is in contact with a bottom surface of the other of the pair of third regions.
5. The semiconductor device according to claim 1 ,
wherein the gate insulating film overlaps with the first region, the pair of second regions, and the pair of third regions.
6. The semiconductor device according to claim 1 ,
wherein the gate insulating film is an oxide insulating film.
7. The semiconductor device according to claim 1 ,
wherein the pair of second regions and the pair of third regions comprise hydrogen or one or more elements selected from rare gas elements as the dopant, and
wherein the dopant concentration of the pair of second regions and the dopant concentration of the pair of third regions are higher than or equal to 5×10 18 atoms/cm 3 and lower than or equal to 1×10 22 atoms/cm 3 .
8. The semiconductor device according to claim 1 ,
wherein the pair of second regions and the pair of third regions comprise hydrogen or one or more elements selected from rare gas elements as the dopant,
wherein the dopant concentration of the pair of second regions is higher than or equal to 5×10 18 atoms/cm 3 and lower than 5×10 19 atoms/cm 3 , and
wherein the dopant concentration of the pair of third regions is higher than or equal to 5×10 19 atoms/cm 3 and lower than or equal to 1×10 22 atoms/cm 3 .
9. The semiconductor device according to claim 1 ,
wherein the oxide semiconductor film comprises two or more elements selected from In, Ga, Sn, and Zn.
10. A semiconductor device comprising:
an oxide semiconductor film comprising:
a first region;
a pair of second regions, the first region located between the pair of second regions; and
a pair of third regions, the first region and the pair of second regions located between the pair of third regions;
a gate insulating film over the oxide semiconductor film;
a first electrode over the gate insulating film and overlapping with the first region; and
a first sidewall insulating film and a second sidewall insulating film located on side surfaces of the first electrode,
wherein the first sidewall insulating film overlaps with one of the pair of second regions, and the second sidewall insulating film overlaps with the other of the pair of second regions,
wherein the first region is a c-axis aligned crystalline oxide semiconductor region,
wherein each of the pair of second regions and the pair of third regions is an amorphous oxide semiconductor region comprising a dopant,
wherein a dopant concentration of the pair of third regions is higher than a dopant concentration of the pair of second regions, and
wherein the gate insulating film overlaps with the pair of third regions.
11. The semiconductor device according to claim 10 , further comprising:
a second electrode electrically connected to one of the pair of third regions; and
a third electrode electrically connected to the other of the pair of third regions.
12. The semiconductor device according to claim 11 ,
wherein the second electrode is in contact with a top surface of the one of the pair of third regions, and
wherein the third electrode is in contact with a top surface of the other of the pair of third regions.
13. The semiconductor device according to claim 11 ,
wherein the second electrode is in contact with a bottom surface of the one of the pair of third regions, and
wherein the third electrode is in contact with a bottom surface of the other of the pair of third regions.
14. The semiconductor device according to claim 10 ,
wherein the gate insulating film overlaps with the first region, the pair of second regions, and the pair of third regions.
15. The semiconductor device according to claim 10 , further comprising:
an insulating layer,
wherein the insulating layer covers the first electrode, the first sidewall and the second sidewall,
wherein the insulating layer is in contact with the first electrode,
wherein the gate insulating film is an oxide insulating film, and
wherein each of the first sidewall insulating film and the second sidewall insulating film is a nitride insulating film.
16. The semiconductor device according to claim 10 , further comprising:
an insulating layer,
wherein the insulating layer covers the first electrode, the first sidewall and the second sidewall,
wherein the insulating layer is in contact with the first electrode, and
wherein each of the gate insulating film, the first sidewall insulating film and the second sidewall insulating film is an oxide insulating film.
17. The semiconductor device according to claim 10 ,
wherein the pair of second regions and the pair of third regions comprise hydrogen or one or more elements selected from rare gas elements as the dopant, and
wherein the dopant concentration of the pair of second regions and the dopant concentration of the pair of third regions are higher than or equal to 5×10 18 atoms/cm 3 and lower than or equal to 1×10 22 atoms/cm 3 .
18. The semiconductor device according to claim 10 ,
wherein the pair of second regions and the pair of third regions comprise hydrogen or one or more elements selected from rare gas elements as the dopant,
wherein the dopant concentration of the pair of second regions is higher than or equal to 5×10 18 atoms/cm 3 and lower than 5×10 19 atoms/cm 3 , and
wherein the dopant concentration of the pair of third regions is higher than or equal to 5×10 19 atoms/cm 3 and lower than or equal to 1×10 22 atoms/cm 3 .
19. The semiconductor device according to claim 10 ,
wherein the oxide semiconductor film comprises two or more elements selected from In, Ga, Sn, and Zn.
20. A semiconductor device comprising:
an oxide semiconductor film comprising:
a first region;
a pair of second regions, the first region located between the pair of second regions; and
a pair of third regions, the first region and the pair of second regions located between the pair of third regions;
a gate insulating film over the oxide semiconductor film; and
a first electrode over the gate insulating film and overlapping with the first region,
wherein the first region comprises crystals of which a c-axis is substantially aligned in a direction perpendicular to a surface of the first region,
wherein each of the pair of second regions and the pair of third regions is an amorphous oxide semiconductor region comprising a dopant,
wherein a dopant concentration of the pair of third regions is higher than a dopant concentration of the pair of second regions, and
wherein the gate insulating film overlaps with the pair of third regions.
21. The semiconductor device according to claim 10 ,
wherein a bottom surface of one of the first sidewall insulating film and the second sidewall insulating film is in contact with the gate insulating film.