IP Library › Granted Patent US 8,941,162
Granted Patent B2
US 8,941,162 · App. 13/270,574 · Granted Jan 27, 2015

Semiconductor device, method for forming the same, and data processing system

Inventor: Mitsunari Sukekawa (Tokyo, JP)
Assignee: PS4 Luxco S.A.R.L.
H01L27/10814H01L27/10823H01L27/10855H01L27/10876H01L27/10885H01L27/10891H01L27/10894H01L27/10897H01L28/91
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Quick Facts
Patent No.
US 8,941,162
App. No.
13/270,574
Granted
Jan 27, 2015
Kind
B2
Abstract

A semiconductor device includes a semiconductor substrate having a first groove, a word line in the first groove, and a buried insulating film in the first groove. The buried insulating film covers the word line. The buried insulating film comprises a silicon nitride film.

Claims (49)

1. A semiconductor device comprising:

an active semiconductor region;

a groove selectively formed to cross the active semiconductor region so that first and second portions sandwiching the groove are defined in the active semiconductor region;

source and drain regions formed in the first and second portions, respectively;

a word line partially filling the groove with an intervention of a gate insulating film between the word line and the groove;

a buried insulating film filling the groove to cover the word line;

a bit line elongated in a direction crossing the word line, the bit line including a portion that is formed over and electrically connected with one of the source and drain regions;

a contact plug formed over and electrically connected with the other of the source and drain regions so that a gap is formed over the buried insulating film and between the contact plug and the portion of the bit line;

a capacitor formed over and electrically connected with the contact plug; and

first, second and third insulating films in the gap, the first insulating film being sandwiched between the second and third insulating films, the second insulating film being in contact with the portion of the bit line and penetrating through the first insulating film to contact the third insulating film, and the third insulating film contacting the contact plug and the first insulating film;

wherein each of the buried insulating film and the second and third insulating films comprises a silicon nitride film, and

wherein the first insulating film is different in material from the silicon nitride film.

2. The semiconductor device according to claim 1 , wherein each of the bit line and the contact plug comprises a plurality of conductive layers.

3. The semiconductor device according to claim 2 , further comprising:

a first conductive layer of the bit line being in direct contact with one of the source and drain regions;

a first conductive layer of the contact plug being in direct contact with the other of the source and drain regions.

4. The semiconductor device according to claim 3 , wherein the first conductive layer of the contact plug is substantially equal in material to the first conductive layer of the bit line.

5. The semiconductor device according to claim 4 , wherein each of the first conductive layers of the bit line and the contact plug comprises an impurity doped silicon film.

6. The semiconductor device according to claim 3 , wherein a second conductive layer of the bit line stacked on the first conductive layer of the bit line is substantially equal in material to a second conductive layer of the contact plug stacked on the first conductive layer of the contact plug.

7. The semiconductor device according to claim 6 , wherein each of the second conductive layers of the bit line and the contact plug comprises a tungsten film.

8. The semiconductor device according to claim 6 , further comprising:

a silicide layer intervening between the first and second conductive layers of the contact plug.

9. The semiconductor device according to claim 6 , further comprising:

a mask insulating film stacked on the second conductive layer of the bit line being substantially equal in width to the bit line, the mask insulating film comprising a silicon nitride film.

10. The semiconductor device according to claim 9 , wherein the capacitor partially overlaps the portion of the bit line with an intervention of the mask insulating film therebetween.

11. The semiconductor device according to claim 1 , wherein each of the bit line and the contact plug partially overlaps the buried insulating film.

12. A semiconductor device comprising:

an active semiconductor region;

a groove crossing the active semiconductor region to define source and drain regions;

a word line partially filling the groove with an intervening gate insulating film between the word line and the groove;

a buried insulating film filling the groove and covering the word line;

a bit line elongated in a direction crossing the word line, the bit line including a portion that is formed over and electrically connected with one of the source and drain regions;

a contact plug formed over and electrically connected with the other of the source and drain regions so that a gap is formed over the buried insulating film and between the contact plug and the portion of the bit line;

a capacitor formed over and electrically connected with the contact plug; and

first, second and third insulating films in the gap, the first insulating film being sandwiched between the second and third insulating films, the second insulating film penetrating through a gap in the first insulating film to contact the third insulating film so as to form an H-shaped configuration;

wherein each of the buried insulating film and the second and third insulating films comprises a silicon nitride film, and

wherein the first insulating film is different in material from the silicon nitride film.

13. The semiconductor device according to claim 12 , wherein each of the bit line and the contact plug comprises a plurality of conductive layers.

14. The semiconductor device according to claim 13 , further comprising:

a first conductive layer of the bit line being in direct contact with one of the source and drain regions;

a first conductive layer of the contact plug being in direct contact with the other of the source and drain regions.

15. The semiconductor device according to claim 14 , wherein the first conductive layer of the contact plug is substantially equal in material to the first conductive layer of the bit line.

16. The semiconductor device according to claim 15 , wherein each of the first conductive layers of the bit line and the contact plug comprises an impurity doped silicon film.

17. The semiconductor device according to claim 14 , wherein a second conductive layer of the bit line stacked on the first conductive layer of the bit line is substantially equal in material to a second conductive layer of the contact plug stacked on the first conductive layer of the contact plug.

18. The semiconductor device according to claim 17 , wherein each of the second conductive layers of the bit line and the contact plug comprises a tungsten film.

19. The semiconductor device according to claim 17 , further comprising:

a silicide layer intervening between the first and second conductive layers of the contact plug.

20. The semiconductor device according to claim 17 , further comprising:

a mask insulating film stacked on the second conductive layer of the bit line being substantially equal in width to the bit line, the mask insulating film comprising a silicon nitride film.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 21, 2018
From: LONGITUDE SEMICONDUCTOR S.A.R.L.
To: LONGITUDE LICENSING LIMITED
Reel/Frame 046865/0667 →
CHANGE OF NAME Recorded Aug 24, 2016
From: PS5 LUXCO S.A.R.L.
To: LONGITUDE SEMICONDUCTOR S.A.R.L.
Reel/Frame 039793/0880 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 24, 2016
From: PS4 LUXCO S.A.R.L.
To: PS5 LUXCO S.A.R.L.
Reel/Frame 039818/0506 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 15, 2014
From: ELPIDA MEMORY, INC.
To: PS4 LUXCO S.A.R.L.
Reel/Frame 032901/0196 →
SECURITY AGREEMENT Recorded Jul 29, 2013
From: PS4 LUXCO S.A.R.L.
To: ELPIDA MEMORY INC.
Reel/Frame 032414/0261 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 11, 2011
From: SUKEKAWA, MITSUNARI
To: ELPIDA MEMORY, INC.
Reel/Frame 027043/0203 →
Priority Claims (1)
JP 2010-230746 · Oct 13, 2010 · national
Continuity (1)
Related Publication 20120091518A1 · Apr 19, 2012